From mboxrd@z Thu Jan 1 00:00:00 1970 From: Biju Das Subject: [PATCH v2] mmc: renesas_sdhi: Add r8a7743/5 support Date: Mon, 21 Aug 2017 11:38:17 +0100 Message-ID: <1503311897-18807-1-git-send-email-biju.das@bp.renesas.com> References: <1502710766-44361-1-git-send-email-biju.das@bp.renesas.com> Return-path: In-Reply-To: <1502710766-44361-1-git-send-email-biju.das-kTT6dE0pTRh9uiUsa/gSgQ@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Ulf Hansson , Rob Herring , Mark Rutland , Wolfram Sang Cc: Simon Horman , Magnus Damm , Chris Paterson , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-renesas-soc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-mmc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Biju Das List-Id: devicetree@vger.kernel.org Add support for r8a7743/5 SoC. Renesas RZ/G1[ME] (R8A7743/5) SDHI is identical to the R-Car Gen2 family. Signed-off-by: Biju Das --- v1->v2 -Modified the listing SoC's description related to SoC with 1 Clock and 2 Clocks This patch is compiled and tested against linux next tag next-20170817. Documentation/devicetree/bindings/mmc/tmio_mmc.txt | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt index 4fd8b7a..1e3106e 100644 --- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt +++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt @@ -15,6 +15,8 @@ Required properties: "renesas,sdhi-r7s72100" - SDHI IP on R7S72100 SoC "renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC "renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC + "renesas,sdhi-r8a7743" - SDHI IP on R8A7743 SoC + "renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC "renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC "renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC "renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC @@ -33,10 +35,9 @@ Required properties: If 2 clocks are specified by the hardware, you must name them as "core" and "cd". If the controller only has 1 clock, naming is not required. - Below is the number clocks for each supported SoC: - 1: SH73A0, R8A73A4, R8A7740, R8A7778, R8A7779, R8A7790 - R8A7791, R8A7792, R8A7793, R8A7794, R8A7795, R8A7796 - 2: R7S72100 + Most supported SoCs only have 1 clock. Devices which have more + than 1 clock are listed below: + 2: R7S72100" Optional properties: - toshiba,mmc-wrprotect-disable: write-protect detection is unavailable -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html