From: Eugeniy Paltsev <Eugeniy.Paltsev-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>
To: Vineet Gupta
<Vineet.Gupta1-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>,
"linux-snps-arc-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
<linux-snps-arc-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
Cc: "linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"mark.rutland-5wv7dgnIgG8@public.gmane.org"
<mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Alexey Brodkin
<Alexey.Brodkin-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>,
"robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org"
<robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
Subject: Re: [PATCH 3/5] ARC: AXS103: DTS: Add core pll node to manage cpu frequency
Date: Wed, 23 Aug 2017 12:18:40 +0000 [thread overview]
Message-ID: <1503490719.15555.1.camel@synopsys.com> (raw)
In-Reply-To: <9624a76d-a31f-10fc-aec5-5ffa1d437c3d-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>
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On Tue, 2017-08-22 at 13:45 -0700, Vineet Gupta wrote:
> On 08/14/2017 09:12 AM, Eugeniy Paltsev wrote:
> > Add core pll node (core_clk) to manage cpu frequency.
> > core_clk represents pll itself.
> > input_clk represents clock signal source (basically xtal) which
> > comes to pll input.
> >
> > Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
> > ---
> >  arch/arc/boot/dts/axc003.dtsi     | 11 +++++++++--
> > Â arch/arc/boot/dts/axc003_idu.dtsi | 11 +++++++++--
> > Â 2 files changed, 18 insertions(+), 4 deletions(-)
> >
> > diff --git a/arch/arc/boot/dts/axc003.dtsi
> > b/arch/arc/boot/dts/axc003.dtsi
> > index cc9239e..dca7e39 100644
> > --- a/arch/arc/boot/dts/axc003.dtsi
> > +++ b/arch/arc/boot/dts/axc003.dtsi
> > @@ -24,10 +24,17 @@
> > Â Â
> > Â Â ranges = <0x00000000 0x0 0xf0000000 0x10000000>;
> > Â Â
> > - core_clk: core_clk {
> > + input_clk: input-clk {
> > Â Â #clock-cells = <0>;
> > Â Â compatible = "fixed-clock";
> > - clock-frequency = <90000000>;
> > + clock-frequency = <33333333>;
> > + };
> > +
> > + core_clk: core-clk@80 {
> > + compatible = "snps,axs10x-arc-pll-clock";
> > + reg = <0x80 0x10>, <0x100 0x10>;
> > + #clock-cells = <0>;
> > + clocks = <&input_clk>;
> > Â Â };
> > Â Â
> > Â Â core_intc: archs-intc@cpu {
> > diff --git a/arch/arc/boot/dts/axc003_idu.dtsi
> > b/arch/arc/boot/dts/axc003_idu.dtsi
> > index 4ebb2170..5b56bef 100644
> > --- a/arch/arc/boot/dts/axc003_idu.dtsi
> > +++ b/arch/arc/boot/dts/axc003_idu.dtsi
> > @@ -24,10 +24,17 @@
> > Â Â
> > Â Â ranges = <0x00000000 0x0 0xf0000000 0x10000000>;
> > Â Â
> > - core_clk: core_clk {
> > + input_clk: input-clk {
> > Â Â #clock-cells = <0>;
> > Â Â compatible = "fixed-clock";
> > - clock-frequency = <100000000>;
> > + clock-frequency = <33333333>;
> > + };
> > +
> > + core_clk: core-clk@80 {
> > + compatible = "snps,axs10x-arc-pll-clock";
> > + reg = <0x80 0x10>, <0x100 0x10>;
> > + #clock-cells = <0>;
> > + clocks = <&input_clk>;
> > Â Â };
> > Â Â
> > Â Â core_intc: archs-intc@cpu {
>
>
> Do we have a bisectability issue here - isn't system broken
> temporarily at 2/5 -Â
> and only 3/5 makes it work again - if so we need to squash them
> together !
Could you please be more specific about this bisectability issue as I
can't see it here.
If we apply 2/5 and don't apply 3/5 we simply won't change frequency
after linux boot. We won't increase frequency so I can't see any
problem here here.
---
The only problem I can see is in 4/5:
I should use
cpu-freq = <90000000>;
instead of
cpu-freq = <100000000>;
in arch/arc/boot/dts/axc003.dtsi
So diff should be like
--------------->8-----------
+Â Â Â Â Â Â Â cpus {
+Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â #address-cells = <1>;
+Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â #size-cells = <0>;
+
+Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â cpu@0 {
+Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â device_type = "cpu";
+Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â compatible = "snps,archs38";
+Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â reg = <0>;
+Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â cpu-freq = <90000000>;
+Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â clocks = <&core_clk>;
+Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â };
+Â Â Â Â Â Â Â };
+
--------------->8-----------
Should I send you v2 respin or you'll fix that up locally?
> -Vineet
--
 Eugeniy PaltsevN§²æìr¸yúèØb²X¬¶Ç§vØ^)Þº{.nÇ+·zøzÚÞz)í
æèw*\x1fjg¬±¨\x1e¶Ý¢j.ïÛ°\½½MúgjÌæa×\x02' ©Þ¢¸\f¢·¦j:+v¨wèjØm¶ÿ¾\a«êçzZ+ùÝ¢j"ú!¶i
next prev parent reply other threads:[~2017-08-23 12:18 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-14 16:12 [PATCH 0/5] Updates to arc clock tree managment Eugeniy Paltsev
2017-08-14 16:12 ` [PATCH 1/5] ARC: set and print cpu frequency at boot time Eugeniy Paltsev
2017-08-14 16:12 ` [PATCH 2/5] ARC: AXS103: Get rid of platform specific cpu clock configuration Eugeniy Paltsev
2017-08-22 20:39 ` Vineet Gupta
2017-08-14 16:12 ` [PATCH 3/5] ARC: AXS103: DTS: Add core pll node to manage cpu frequency Eugeniy Paltsev
[not found] ` <20170814161213.17522-4-Eugeniy.Paltsev-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>
2017-08-22 20:40 ` Vineet Gupta
2017-08-22 20:45 ` Vineet Gupta
[not found] ` <9624a76d-a31f-10fc-aec5-5ffa1d437c3d-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>
2017-08-23 12:18 ` Eugeniy Paltsev [this message]
2017-08-14 16:12 ` [PATCH 4/5] ARC: AXS103: DTS: Set cpu frequency explicitly via dts Eugeniy Paltsev
[not found] ` <20170814161213.17522-5-Eugeniy.Paltsev-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>
2017-08-22 21:40 ` Vineet Gupta
[not found] ` <4685c3d5-7a2f-78cd-a11b-2eda0de2dd35-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>
2017-08-23 11:24 ` Eugeniy Paltsev
[not found] ` <1503487454.2586.58.camel-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>
2017-08-23 16:39 ` Vineet Gupta
2017-08-14 16:12 ` [PATCH 5/5] ARC: AXS103: use cpu-freq param instead of /cpu_card/core_clk Eugeniy Paltsev
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