From: Biju Das <biju.das@bp.renesas.com>
To: Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>
Cc: Simon Horman <horms@verge.net.au>,
Magnus Damm <magnus.damm@gmail.com>,
Russell King <linux@armlinux.org.uk>,
Chris Paterson <chris.paterson2@renesas.com>,
devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Biju Das <biju.das@bp.renesas.com>
Subject: [PATCH 1/5] ARM: dts: r8a7743: Add internal PCI bridge nodes
Date: Wed, 30 Aug 2017 14:41:09 +0100 [thread overview]
Message-ID: <1504100473-5528-2-git-send-email-biju.das@bp.renesas.com> (raw)
In-Reply-To: <1504100473-5528-1-git-send-email-biju.das@bp.renesas.com>
Add device nodes for the r8a7743 internal PCI bridge devices.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
arch/arm/boot/dts/r8a7743.dtsi | 46 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 6dd9b0b..3f1faad 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -821,6 +821,52 @@
resets = <&cpg 311>;
status = "disabled";
};
+
+ pci0: pci@ee090000 {
+ compatible = "renesas,pci-r8a7743",
+ "renesas,pci-rcar-gen2";
+ device_type = "pci";
+ reg = <0 0xee090000 0 0xc00>,
+ <0 0xee080000 0 0x1100>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+
+ bus-range = <0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
+ interrupt-map-mask = <0xff00 0 0 0x7>;
+ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+ 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pci1: pci@ee0d0000 {
+ compatible = "renesas,pci-r8a7743",
+ "renesas,pci-rcar-gen2";
+ device_type = "pci";
+ reg = <0 0xee0d0000 0 0xc00>,
+ <0 0xee0c0000 0 0x1100>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+
+ bus-range = <1 1>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
+ interrupt-map-mask = <0xff00 0 0 0x7>;
+ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+ };
};
/* External root clock */
--
1.9.1
next prev parent reply other threads:[~2017-08-30 13:41 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-30 13:41 [PATCH 0/5] Add USB2.0 Host support Biju Das
2017-08-30 13:41 ` Biju Das [this message]
[not found] ` <1504100473-5528-1-git-send-email-biju.das-kTT6dE0pTRh9uiUsa/gSgQ@public.gmane.org>
2017-08-30 13:41 ` [PATCH 2/5] ARM: dts: r8a7743: Add USB PHY DT support Biju Das
2017-08-30 13:41 ` [PATCH 3/5] ARM: dts: r8a7743: Link PCI USB devices to USB PHY Biju Das
2017-08-30 13:41 ` [PATCH 4/5] ARM: dts: iwg20d-q7: Enable internal PCI Biju Das
2017-08-30 13:41 ` [PATCH 5/5] ARM: dts: iwg20d-q7: Enable USB PHY Biju Das
2017-09-01 8:55 ` [PATCH 0/5] Add USB2.0 Host support Simon Horman
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