* [PATCH 0/5] ARM: dts: rcar-gen2: Add reset control properties
@ 2017-09-11 13:09 Geert Uytterhoeven
2017-09-11 13:09 ` [PATCH 1/5] ARM: dts: r8a7790: " Geert Uytterhoeven
` (4 more replies)
0 siblings, 5 replies; 7+ messages in thread
From: Geert Uytterhoeven @ 2017-09-11 13:09 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-renesas-soc-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA, Geert Uytterhoeven
Hi Simon, Magnus,
This patch series describes the reset topology on all R-Car Gen2 Socs, like
was done before for R-Car Gen3 and RZ/G1.
Resets usually match the corresponding module clocks. Exceptions are:
- The audio module has resets for the Serial Sound Interfaces only,
- The display module has only a single reset for all DU channels, but
adding reset properties for the display is postponed upon request from
Laurent.
Note that this patch series contains hardware description only.
Actual reset policy is to be defined and implemented separately.
Also, this is an optional feature, to be enabled explicitly using
CONFIG_RESET_CONTROLLER=y. When enabled, an on-SoC device can be reset
easily using device_reset(), or by using the reset_control_*() API when
more fine-grained control is desired.
Possible use cases are (not exhaustive):
- Reset a device before use, to make sure it's in a predefined state, and
doesn't depend on earlier configuration by e.g. the boot loader,
- Reset a device after detecting an anomaly,
- Reset a device to verify suspend/resume is handled correctly by the
driver in case the device would be part of a power domain on a
different/future SoC.
This has been tested on r8a7790/lager, r8a7791/koelsch, r8a7792/blanche,
and r8a7794/alt (r8a7793/gose was offline).
Thanks for applying!
Geert Uytterhoeven (5):
ARM: dts: r8a7790: Add reset control properties
ARM: dts: r8a7791: Add reset control properties
ARM: dts: r8a7792: Add reset control properties
ARM: dts: r8a7793: Add reset control properties
ARM: dts: r8a7794: Add reset control properties
arch/arm/boot/dts/r8a7790.dtsi | 76 +++++++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/r8a7791.dtsi | 82 ++++++++++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/r8a7792.dtsi | 45 +++++++++++++++++++++++
arch/arm/boot/dts/r8a7793.dtsi | 62 ++++++++++++++++++++++++++++++++
arch/arm/boot/dts/r8a7794.dtsi | 64 +++++++++++++++++++++++++++++++++
5 files changed, 329 insertions(+)
--
2.7.4
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
--
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^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 1/5] ARM: dts: r8a7790: Add reset control properties
2017-09-11 13:09 [PATCH 0/5] ARM: dts: rcar-gen2: Add reset control properties Geert Uytterhoeven
@ 2017-09-11 13:09 ` Geert Uytterhoeven
2017-09-11 13:09 ` [PATCH 2/5] ARM: dts: r8a7791: " Geert Uytterhoeven
` (3 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Geert Uytterhoeven @ 2017-09-11 13:09 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-renesas-soc, linux-arm-kernel, devicetree,
Geert Uytterhoeven
Add properties to describe the reset topology for on-SoC devices:
- Add the "#reset-cells" property to the CPG/MSSR device node,
- Add resets and reset-names properties to the various device nodes.
This allows to reset SoC devices using the Reset Controller API.
Note that resets usually match the corresponding module clocks.
Exceptions are:
- The audio module has resets for the Serial Sound Interfaces only,
- The display module has only a single reset for all DU channels, but
adding reset properties for the display is postponed.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7790.dtsi | 76 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 76 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 70040c6c4ceac114..081cf5cdb13bf2ce 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -188,6 +188,7 @@
clocks = <&cpg CPG_MOD 408>;
clock-names = "clk";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 408>;
};
gpio0: gpio@e6050000 {
@@ -201,6 +202,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 912>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 912>;
};
gpio1: gpio@e6051000 {
@@ -214,6 +216,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 911>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 911>;
};
gpio2: gpio@e6052000 {
@@ -227,6 +230,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 910>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 910>;
};
gpio3: gpio@e6053000 {
@@ -240,6 +244,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 909>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 909>;
};
gpio4: gpio@e6054000 {
@@ -253,6 +258,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 908>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 908>;
};
gpio5: gpio@e6055000 {
@@ -266,6 +272,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 907>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 907>;
};
thermal: thermal@e61f0000 {
@@ -276,6 +283,7 @@
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 522>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 522>;
#thermal-sensor-cells = <0>;
};
@@ -295,6 +303,7 @@
clocks = <&cpg CPG_MOD 124>;
clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 124>;
renesas,channels-mask = <0x60>;
@@ -315,6 +324,7 @@
clocks = <&cpg CPG_MOD 329>;
clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 329>;
renesas,channels-mask = <0xff>;
@@ -332,6 +342,7 @@
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 407>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 407>;
};
dmac0: dma-controller@e6700000 {
@@ -361,6 +372,7 @@
clocks = <&cpg CPG_MOD 219>;
clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 219>;
#dma-cells = <1>;
dma-channels = <15>;
};
@@ -392,6 +404,7 @@
clocks = <&cpg CPG_MOD 218>;
clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 218>;
#dma-cells = <1>;
dma-channels = <15>;
};
@@ -421,6 +434,7 @@
clocks = <&cpg CPG_MOD 502>;
clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 502>;
#dma-cells = <1>;
dma-channels = <13>;
};
@@ -450,6 +464,7 @@
clocks = <&cpg CPG_MOD 501>;
clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 501>;
#dma-cells = <1>;
dma-channels = <13>;
};
@@ -462,6 +477,7 @@
interrupt-names = "ch0", "ch1";
clocks = <&cpg CPG_MOD 330>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 330>;
#dma-cells = <1>;
dma-channels = <2>;
};
@@ -474,6 +490,7 @@
interrupt-names = "ch0", "ch1";
clocks = <&cpg CPG_MOD 331>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 331>;
#dma-cells = <1>;
dma-channels = <2>;
};
@@ -486,6 +503,7 @@
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 931>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 931>;
i2c-scl-internal-delay-ns = <110>;
status = "disabled";
};
@@ -498,6 +516,7 @@
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 930>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 930>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
@@ -510,6 +529,7 @@
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 929>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 929>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
@@ -522,6 +542,7 @@
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 928>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 928>;
i2c-scl-internal-delay-ns = <110>;
status = "disabled";
};
@@ -538,6 +559,7 @@
<&dmac1 0x61>, <&dmac1 0x62>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 318>;
status = "disabled";
};
@@ -553,6 +575,7 @@
<&dmac1 0x65>, <&dmac1 0x66>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 323>;
status = "disabled";
};
@@ -568,6 +591,7 @@
<&dmac1 0x69>, <&dmac1 0x6a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 300>;
status = "disabled";
};
@@ -583,6 +607,7 @@
<&dmac1 0x77>, <&dmac1 0x78>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 926>;
status = "disabled";
};
@@ -595,6 +620,7 @@
<&dmac1 0xd1>, <&dmac1 0xd2>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 315>;
reg-io-width = <4>;
status = "disabled";
max-frequency = <97500000>;
@@ -609,6 +635,7 @@
<&dmac1 0xe1>, <&dmac1 0xe2>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 305>;
reg-io-width = <4>;
status = "disabled";
max-frequency = <97500000>;
@@ -629,6 +656,7 @@
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <195000000>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 314>;
status = "disabled";
};
@@ -642,6 +670,7 @@
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <195000000>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 313>;
status = "disabled";
};
@@ -655,6 +684,7 @@
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 312>;
status = "disabled";
};
@@ -668,6 +698,7 @@
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 311>;
status = "disabled";
};
@@ -682,6 +713,7 @@
<&dmac1 0x21>, <&dmac1 0x22>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 204>;
status = "disabled";
};
@@ -696,6 +728,7 @@
<&dmac1 0x25>, <&dmac1 0x26>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 203>;
status = "disabled";
};
@@ -710,6 +743,7 @@
<&dmac1 0x27>, <&dmac1 0x28>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 202>;
status = "disabled";
};
@@ -724,6 +758,7 @@
<&dmac1 0x3d>, <&dmac1 0x3e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 206>;
status = "disabled";
};
@@ -738,6 +773,7 @@
<&dmac1 0x19>, <&dmac1 0x1a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 207>;
status = "disabled";
};
@@ -752,6 +788,7 @@
<&dmac1 0x1d>, <&dmac1 0x1e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 216>;
status = "disabled";
};
@@ -767,6 +804,7 @@
<&dmac1 0x29>, <&dmac1 0x2a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 721>;
status = "disabled";
};
@@ -782,6 +820,7 @@
<&dmac1 0x2d>, <&dmac1 0x2e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 720>;
status = "disabled";
};
@@ -797,6 +836,7 @@
<&dmac1 0x2b>, <&dmac1 0x2c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 310>;
status = "disabled";
};
@@ -812,6 +852,7 @@
<&dmac1 0x39>, <&dmac1 0x3a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 717>;
status = "disabled";
};
@@ -827,6 +868,7 @@
<&dmac1 0x4d>, <&dmac1 0x4e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 716>;
status = "disabled";
};
@@ -854,6 +896,7 @@
interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 813>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 813>;
phy-mode = "rmii";
#address-cells = <1>;
#size-cells = <0>;
@@ -867,6 +910,7 @@
interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 812>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 812>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -878,6 +922,7 @@
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 815>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 815>;
status = "disabled";
};
@@ -887,6 +932,7 @@
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 814>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 814>;
status = "disabled";
};
@@ -899,6 +945,7 @@
<&usb_dmac1 0>, <&usb_dmac1 1>;
dma-names = "ch0", "ch1", "ch2", "ch3";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 704>;
renesas,buswait = <4>;
phys = <&usb0 1>;
phy-names = "usb";
@@ -914,6 +961,7 @@
clocks = <&cpg CPG_MOD 704>;
clock-names = "usbhs";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 704>;
status = "disabled";
usb0: usb-channel@0 {
@@ -932,6 +980,7 @@
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 811>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 811>;
status = "disabled";
};
@@ -941,6 +990,7 @@
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 810>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 810>;
status = "disabled";
};
@@ -950,6 +1000,7 @@
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 809>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 809>;
status = "disabled";
};
@@ -959,6 +1010,7 @@
interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 808>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 808>;
status = "disabled";
};
@@ -968,6 +1020,7 @@
interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 130>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 130>;
};
vsp1@fe928000 {
@@ -976,6 +1029,7 @@
interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 131>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 131>;
};
vsp1@fe930000 {
@@ -984,6 +1038,7 @@
interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 128>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 128>;
};
vsp1@fe938000 {
@@ -992,6 +1047,7 @@
interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 127>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 127>;
};
du: display@feb00000 {
@@ -1039,6 +1095,7 @@
<&can_clk>;
clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 916>;
status = "disabled";
};
@@ -1050,6 +1107,7 @@
<&can_clk>;
clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 915>;
status = "disabled";
};
@@ -1059,6 +1117,7 @@
interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 106>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 106>;
};
/* External root clock */
@@ -1154,6 +1213,7 @@
<&dmac1 0x17>, <&dmac1 0x18>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
@@ -1170,6 +1230,7 @@
<&dmac1 0x51>, <&dmac1 0x52>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -1185,6 +1246,7 @@
<&dmac1 0x55>, <&dmac1 0x56>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 208>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -1200,6 +1262,7 @@
<&dmac1 0x41>, <&dmac1 0x42>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 205>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -1215,6 +1278,7 @@
<&dmac1 0x45>, <&dmac1 0x46>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 215>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -1226,6 +1290,7 @@
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 328>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 328>;
phys = <&usb2 1>;
phy-names = "usb";
status = "disabled";
@@ -1239,6 +1304,7 @@
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
status = "disabled";
bus-range = <0 0>;
@@ -1272,6 +1338,7 @@
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
status = "disabled";
bus-range = <1 1>;
@@ -1290,6 +1357,7 @@
device_type = "pci";
clocks = <&cpg CPG_MOD 703>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
reg = <0 0xee0d0000 0 0xc00>,
<0 0xee0c0000 0 0x1100>;
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
@@ -1341,6 +1409,7 @@
clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 319>;
status = "disabled";
};
@@ -1385,6 +1454,13 @@
"dvc.0", "dvc.1",
"clk_a", "clk_b", "clk_c", "clk_i";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 1005>,
+ <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
+ <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
+ <&cpg 1014>, <&cpg 1015>;
+ reset-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
+ "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
status = "disabled";
--
2.7.4
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/5] ARM: dts: r8a7791: Add reset control properties
2017-09-11 13:09 [PATCH 0/5] ARM: dts: rcar-gen2: Add reset control properties Geert Uytterhoeven
2017-09-11 13:09 ` [PATCH 1/5] ARM: dts: r8a7790: " Geert Uytterhoeven
@ 2017-09-11 13:09 ` Geert Uytterhoeven
2017-09-11 13:09 ` [PATCH 3/5] ARM: dts: r8a7792: " Geert Uytterhoeven
` (2 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Geert Uytterhoeven @ 2017-09-11 13:09 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-renesas-soc, linux-arm-kernel, devicetree,
Geert Uytterhoeven
Add properties to describe the reset topology for on-SoC devices:
- Add the "#reset-cells" property to the CPG/MSSR device node,
- Add resets and reset-names properties to the various device nodes.
This allows to reset SoC devices using the Reset Controller API.
Note that resets usually match the corresponding module clocks.
Exceptions are:
- The audio module has resets for the Serial Sound Interfaces only,
- The display module has only a single reset for all DU channels, but
adding reset properties for the display is postponed.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7791.dtsi | 82 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 82 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index e984b106dd1acd7b..5a8a158470765d89 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -120,6 +120,7 @@
clocks = <&cpg CPG_MOD 408>;
clock-names = "clk";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 408>;
};
gpio0: gpio@e6050000 {
@@ -133,6 +134,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 912>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 912>;
};
gpio1: gpio@e6051000 {
@@ -146,6 +148,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 911>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 911>;
};
gpio2: gpio@e6052000 {
@@ -159,6 +162,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 910>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 910>;
};
gpio3: gpio@e6053000 {
@@ -172,6 +176,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 909>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 909>;
};
gpio4: gpio@e6054000 {
@@ -185,6 +190,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 908>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 908>;
};
gpio5: gpio@e6055000 {
@@ -198,6 +204,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 907>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 907>;
};
gpio6: gpio@e6055400 {
@@ -211,6 +218,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 905>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 905>;
};
gpio7: gpio@e6055800 {
@@ -224,6 +232,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 904>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 904>;
};
thermal: thermal@e61f0000 {
@@ -234,6 +243,7 @@
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 522>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 522>;
#thermal-sensor-cells = <0>;
};
@@ -253,6 +263,7 @@
clocks = <&cpg CPG_MOD 124>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 124>;
renesas,channels-mask = <0x60>;
@@ -273,6 +284,7 @@
clocks = <&cpg CPG_MOD 329>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 329>;
renesas,channels-mask = <0xff>;
@@ -296,6 +308,7 @@
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 407>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 407>;
};
dmac0: dma-controller@e6700000 {
@@ -325,6 +338,7 @@
clocks = <&cpg CPG_MOD 219>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 219>;
#dma-cells = <1>;
dma-channels = <15>;
};
@@ -356,6 +370,7 @@
clocks = <&cpg CPG_MOD 218>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 218>;
#dma-cells = <1>;
dma-channels = <15>;
};
@@ -385,6 +400,7 @@
clocks = <&cpg CPG_MOD 502>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 502>;
#dma-cells = <1>;
dma-channels = <13>;
};
@@ -414,6 +430,7 @@
clocks = <&cpg CPG_MOD 501>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 501>;
#dma-cells = <1>;
dma-channels = <13>;
};
@@ -426,6 +443,7 @@
interrupt-names = "ch0", "ch1";
clocks = <&cpg CPG_MOD 330>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 330>;
#dma-cells = <1>;
dma-channels = <2>;
};
@@ -438,6 +456,7 @@
interrupt-names = "ch0", "ch1";
clocks = <&cpg CPG_MOD 331>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 331>;
#dma-cells = <1>;
dma-channels = <2>;
};
@@ -451,6 +470,7 @@
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 931>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 931>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
@@ -463,6 +483,7 @@
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 930>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 930>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
@@ -475,6 +496,7 @@
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 929>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 929>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
@@ -487,6 +509,7 @@
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 928>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 928>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
@@ -499,6 +522,7 @@
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 927>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 927>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
@@ -512,6 +536,7 @@
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 925>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 925>;
i2c-scl-internal-delay-ns = <110>;
status = "disabled";
};
@@ -529,6 +554,7 @@
<&dmac1 0x77>, <&dmac1 0x78>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 926>;
status = "disabled";
};
@@ -544,6 +570,7 @@
<&dmac1 0x61>, <&dmac1 0x62>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 318>;
status = "disabled";
};
@@ -559,6 +586,7 @@
<&dmac1 0x65>, <&dmac1 0x66>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 323>;
status = "disabled";
};
@@ -576,6 +604,7 @@
<&dmac1 0xd1>, <&dmac1 0xd2>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 315>;
reg-io-width = <4>;
status = "disabled";
max-frequency = <97500000>;
@@ -591,6 +620,7 @@
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <195000000>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 314>;
status = "disabled";
};
@@ -604,6 +634,7 @@
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 312>;
status = "disabled";
};
@@ -617,6 +648,7 @@
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 311>;
status = "disabled";
};
@@ -631,6 +663,7 @@
<&dmac1 0x21>, <&dmac1 0x22>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 204>;
status = "disabled";
};
@@ -645,6 +678,7 @@
<&dmac1 0x25>, <&dmac1 0x26>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 203>;
status = "disabled";
};
@@ -659,6 +693,7 @@
<&dmac1 0x27>, <&dmac1 0x28>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 202>;
status = "disabled";
};
@@ -673,6 +708,7 @@
<&dmac1 0x1b>, <&dmac1 0x1c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 1106>;
status = "disabled";
};
@@ -687,6 +723,7 @@
<&dmac1 0x1f>, <&dmac1 0x20>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 1107>;
status = "disabled";
};
@@ -701,6 +738,7 @@
<&dmac1 0x23>, <&dmac1 0x24>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 1108>;
status = "disabled";
};
@@ -715,6 +753,7 @@
<&dmac1 0x3d>, <&dmac1 0x3e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 206>;
status = "disabled";
};
@@ -729,6 +768,7 @@
<&dmac1 0x19>, <&dmac1 0x1a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 207>;
status = "disabled";
};
@@ -743,6 +783,7 @@
<&dmac1 0x1d>, <&dmac1 0x1e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 216>;
status = "disabled";
};
@@ -758,6 +799,7 @@
<&dmac1 0x29>, <&dmac1 0x2a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 721>;
status = "disabled";
};
@@ -773,6 +815,7 @@
<&dmac1 0x2d>, <&dmac1 0x2e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 720>;
status = "disabled";
};
@@ -782,6 +825,7 @@
clocks = <&cpg CPG_MOD 901>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 901>;
status = "disabled";
};
@@ -797,6 +841,7 @@
<&dmac1 0x2b>, <&dmac1 0x2c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 719>;
status = "disabled";
};
@@ -812,6 +857,7 @@
<&dmac1 0x2f>, <&dmac1 0x30>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 718>;
status = "disabled";
};
@@ -827,6 +873,7 @@
<&dmac1 0xfb>, <&dmac1 0xfc>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 715>;
status = "disabled";
};
@@ -842,6 +889,7 @@
<&dmac1 0xfd>, <&dmac1 0xfe>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 714>;
status = "disabled";
};
@@ -857,6 +905,7 @@
<&dmac1 0x39>, <&dmac1 0x3a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 717>;
status = "disabled";
};
@@ -872,6 +921,7 @@
<&dmac1 0x4d>, <&dmac1 0x4e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 716>;
status = "disabled";
};
@@ -887,6 +937,7 @@
<&dmac1 0x3b>, <&dmac1 0x3c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 713>;
status = "disabled";
};
@@ -914,6 +965,7 @@
interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 813>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 813>;
phy-mode = "rmii";
#address-cells = <1>;
#size-cells = <0>;
@@ -927,6 +979,7 @@
interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 812>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 812>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -938,6 +991,7 @@
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 815>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 815>;
status = "disabled";
};
@@ -947,6 +1001,7 @@
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 814>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 814>;
status = "disabled";
};
@@ -959,6 +1014,7 @@
<&usb_dmac1 0>, <&usb_dmac1 1>;
dma-names = "ch0", "ch1", "ch2", "ch3";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 704>;
renesas,buswait = <4>;
phys = <&usb0 1>;
phy-names = "usb";
@@ -974,6 +1030,7 @@
clocks = <&cpg CPG_MOD 704>;
clock-names = "usbhs";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 704>;
status = "disabled";
usb0: usb-channel@0 {
@@ -992,6 +1049,7 @@
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 811>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 811>;
status = "disabled";
};
@@ -1001,6 +1059,7 @@
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 810>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 810>;
status = "disabled";
};
@@ -1010,6 +1069,7 @@
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 809>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 809>;
status = "disabled";
};
@@ -1019,6 +1079,7 @@
interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 131>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 131>;
};
vsp1@fe930000 {
@@ -1027,6 +1088,7 @@
interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 128>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 128>;
};
vsp1@fe938000 {
@@ -1035,6 +1097,7 @@
interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 127>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 127>;
};
du: display@feb00000 {
@@ -1075,6 +1138,7 @@
<&can_clk>;
clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 916>;
status = "disabled";
};
@@ -1086,6 +1150,7 @@
<&can_clk>;
clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 915>;
status = "disabled";
};
@@ -1095,6 +1160,7 @@
interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 106>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 106>;
};
/* External root clock */
@@ -1163,6 +1229,7 @@
clock-names = "extal", "usb_extal";
#clock-cells = <2>;
#power-domain-cells = <0>;
+ #reset-cells = <1>;
};
rst: reset-controller@e6160000 {
@@ -1190,6 +1257,7 @@
<&dmac1 0x17>, <&dmac1 0x18>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
@@ -1206,6 +1274,7 @@
<&dmac1 0x51>, <&dmac1 0x52>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -1221,6 +1290,7 @@
<&dmac1 0x55>, <&dmac1 0x56>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 208>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -1236,6 +1306,7 @@
<&dmac1 0x41>, <&dmac1 0x42>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 205>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -1247,6 +1318,7 @@
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 328>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 328>;
phys = <&usb2 1>;
phy-names = "usb";
status = "disabled";
@@ -1260,6 +1332,7 @@
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
status = "disabled";
bus-range = <0 0>;
@@ -1293,6 +1366,7 @@
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
status = "disabled";
bus-range = <1 1>;
@@ -1341,6 +1415,7 @@
clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 319>;
status = "disabled";
};
@@ -1445,6 +1520,13 @@
"dvc.0", "dvc.1",
"clk_a", "clk_b", "clk_c", "clk_i";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 1005>,
+ <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
+ <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
+ <&cpg 1014>, <&cpg 1015>;
+ reset-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
+ "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
status = "disabled";
--
2.7.4
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 3/5] ARM: dts: r8a7792: Add reset control properties
2017-09-11 13:09 [PATCH 0/5] ARM: dts: rcar-gen2: Add reset control properties Geert Uytterhoeven
2017-09-11 13:09 ` [PATCH 1/5] ARM: dts: r8a7790: " Geert Uytterhoeven
2017-09-11 13:09 ` [PATCH 2/5] ARM: dts: r8a7791: " Geert Uytterhoeven
@ 2017-09-11 13:09 ` Geert Uytterhoeven
[not found] ` <1505135399-24840-1-git-send-email-geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
2017-09-11 13:09 ` [PATCH 5/5] ARM: dts: r8a7794: " Geert Uytterhoeven
4 siblings, 0 replies; 7+ messages in thread
From: Geert Uytterhoeven @ 2017-09-11 13:09 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-renesas-soc, linux-arm-kernel, devicetree,
Geert Uytterhoeven
Add properties to describe the reset topology for on-SoC devices:
- Add the "#reset-cells" property to the CPG/MSSR device node,
- Add resets and reset-names properties to the various device nodes.
This allows to reset SoC devices using the Reset Controller API.
Note that resets usually match the corresponding module clocks.
Exceptions are:
- The audio module has resets for the Serial Sound Interfaces only,
but audio is not yet enabled in r8a7792.dtsi,
- The display module has only a single reset for all DU channels, but
adding reset properties for the display is postponed.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7792.dtsi | 45 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index a209787d899ac452..c332f77ebb6b9349 100644
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi
@@ -95,6 +95,7 @@
clocks = <&cpg CPG_MOD 408>;
clock-names = "clk";
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 408>;
};
irqc: interrupt-controller@e61c0000 {
@@ -108,6 +109,7 @@
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 407>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 407>;
};
timer {
@@ -155,6 +157,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 912>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 912>;
};
gpio1: gpio@e6051000 {
@@ -169,6 +172,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 911>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 911>;
};
gpio2: gpio@e6052000 {
@@ -183,6 +187,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 910>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 910>;
};
gpio3: gpio@e6053000 {
@@ -197,6 +202,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 909>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 909>;
};
gpio4: gpio@e6054000 {
@@ -211,6 +217,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 908>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 908>;
};
gpio5: gpio@e6055000 {
@@ -225,6 +232,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 907>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 907>;
};
gpio6: gpio@e6055100 {
@@ -239,6 +247,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 905>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 905>;
};
gpio7: gpio@e6055200 {
@@ -253,6 +262,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 904>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 904>;
};
gpio8: gpio@e6055300 {
@@ -267,6 +277,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 921>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 921>;
};
gpio9: gpio@e6055400 {
@@ -281,6 +292,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 919>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 919>;
};
gpio10: gpio@e6055500 {
@@ -295,6 +307,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 914>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 914>;
};
gpio11: gpio@e6055600 {
@@ -309,6 +322,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 913>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 913>;
};
dmac0: dma-controller@e6700000 {
@@ -339,6 +353,7 @@
clocks = <&cpg CPG_MOD 219>;
clock-names = "fck";
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 219>;
#dma-cells = <1>;
dma-channels = <15>;
};
@@ -371,6 +386,7 @@
clocks = <&cpg CPG_MOD 218>;
clock-names = "fck";
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 218>;
#dma-cells = <1>;
dma-channels = <15>;
};
@@ -387,6 +403,7 @@
<&dmac1 0x29>, <&dmac1 0x2a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 721>;
status = "disabled";
};
@@ -402,6 +419,7 @@
<&dmac1 0x2d>, <&dmac1 0x2e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 720>;
status = "disabled";
};
@@ -417,6 +435,7 @@
<&dmac1 0x2b>, <&dmac1 0x2c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 719>;
status = "disabled";
};
@@ -432,6 +451,7 @@
<&dmac1 0x2f>, <&dmac1 0x30>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 718>;
status = "disabled";
};
@@ -447,6 +467,7 @@
<&dmac1 0x39>, <&dmac1 0x3a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 717>;
status = "disabled";
};
@@ -462,6 +483,7 @@
<&dmac1 0x4d>, <&dmac1 0x4e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 716>;
status = "disabled";
};
@@ -492,6 +514,7 @@
dma-names = "tx", "rx", "tx", "rx";
clocks = <&cpg CPG_MOD 314>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 314>;
status = "disabled";
};
@@ -502,6 +525,7 @@
interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 106>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 106>;
};
avb: ethernet@e6800000 {
@@ -511,6 +535,7 @@
interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 812>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 812>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -524,6 +549,7 @@
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 931>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 931>;
i2c-scl-internal-delay-ns = <6>;
#address-cells = <1>;
#size-cells = <0>;
@@ -537,6 +563,7 @@
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 930>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 930>;
i2c-scl-internal-delay-ns = <6>;
#address-cells = <1>;
#size-cells = <0>;
@@ -550,6 +577,7 @@
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 929>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 929>;
i2c-scl-internal-delay-ns = <6>;
#address-cells = <1>;
#size-cells = <0>;
@@ -563,6 +591,7 @@
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 928>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 928>;
i2c-scl-internal-delay-ns = <6>;
#address-cells = <1>;
#size-cells = <0>;
@@ -576,6 +605,7 @@
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 927>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 927>;
i2c-scl-internal-delay-ns = <6>;
#address-cells = <1>;
#size-cells = <0>;
@@ -589,6 +619,7 @@
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 925>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 925>;
i2c-scl-internal-delay-ns = <110>;
#address-cells = <1>;
#size-cells = <0>;
@@ -604,6 +635,7 @@
<&dmac1 0x17>, <&dmac1 0x18>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
@@ -620,6 +652,7 @@
<&dmac1 0x51>, <&dmac1 0x52>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 000>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -635,6 +668,7 @@
<&dmac1 0x55>, <&dmac1 0x56>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 208>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -677,6 +711,7 @@
<&cpg CPG_CORE R8A7792_CLK_RCAN>, <&can_clk>;
clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 916>;
status = "disabled";
};
@@ -689,6 +724,7 @@
<&cpg CPG_CORE R8A7792_CLK_RCAN>, <&can_clk>;
clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 915>;
status = "disabled";
};
@@ -699,6 +735,7 @@
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 811>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 811>;
status = "disabled";
};
@@ -709,6 +746,7 @@
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 810>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 810>;
status = "disabled";
};
@@ -719,6 +757,7 @@
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 809>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 809>;
status = "disabled";
};
@@ -729,6 +768,7 @@
interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 808>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 808>;
status = "disabled";
};
@@ -739,6 +779,7 @@
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 805>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 805>;
status = "disabled";
};
@@ -749,6 +790,7 @@
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 804>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 804>;
status = "disabled";
};
@@ -758,6 +800,7 @@
interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 131>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 131>;
};
vsp1@fe930000 {
@@ -766,6 +809,7 @@
interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 128>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 128>;
};
vsp1@fe938000 {
@@ -774,6 +818,7 @@
interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 127>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 127>;
};
cpg: clock-controller@e6150000 {
--
2.7.4
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 4/5] ARM: dts: r8a7793: Add reset control properties
[not found] ` <1505135399-24840-1-git-send-email-geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
@ 2017-09-11 13:09 ` Geert Uytterhoeven
2017-09-13 7:36 ` [PATCH 0/5] ARM: dts: rcar-gen2: " Simon Horman
1 sibling, 0 replies; 7+ messages in thread
From: Geert Uytterhoeven @ 2017-09-11 13:09 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-renesas-soc-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA, Geert Uytterhoeven
Add properties to describe the reset topology for on-SoC devices:
- Add the "#reset-cells" property to the CPG/MSSR device node,
- Add resets and reset-names properties to the various device nodes.
This allows to reset SoC devices using the Reset Controller API.
Note that resets usually match the corresponding module clocks.
Exceptions are:
- The audio module has resets for the Serial Sound Interfaces only,
- The display module has only a single reset for all DU channels, but
adding reset properties for the display is postponed.
Signed-off-by: Geert Uytterhoeven <geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
---
arch/arm/boot/dts/r8a7793.dtsi | 62 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 62 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index d48b97c853cdc4d2..aa19b93494bfaab0 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -111,6 +111,7 @@
clocks = <&cpg CPG_MOD 408>;
clock-names = "clk";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 408>;
};
gpio0: gpio@e6050000 {
@@ -124,6 +125,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 912>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 912>;
};
gpio1: gpio@e6051000 {
@@ -137,6 +139,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 911>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 911>;
};
gpio2: gpio@e6052000 {
@@ -150,6 +153,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 910>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 910>;
};
gpio3: gpio@e6053000 {
@@ -163,6 +167,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 909>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 909>;
};
gpio4: gpio@e6054000 {
@@ -176,6 +181,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 908>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 908>;
};
gpio5: gpio@e6055000 {
@@ -189,6 +195,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 907>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 907>;
};
gpio6: gpio@e6055400 {
@@ -202,6 +209,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 905>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 905>;
};
gpio7: gpio@e6055800 {
@@ -215,6 +223,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 904>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 904>;
};
thermal: thermal@e61f0000 {
@@ -225,6 +234,7 @@
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 522>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 522>;
#thermal-sensor-cells = <0>;
};
@@ -244,6 +254,7 @@
clocks = <&cpg CPG_MOD 124>;
clock-names = "fck";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 124>;
renesas,channels-mask = <0x60>;
@@ -264,6 +275,7 @@
clocks = <&cpg CPG_MOD 329>;
clock-names = "fck";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 329>;
renesas,channels-mask = <0xff>;
@@ -287,6 +299,7 @@
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 407>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 407>;
};
dmac0: dma-controller@e6700000 {
@@ -316,6 +329,7 @@
clocks = <&cpg CPG_MOD 219>;
clock-names = "fck";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 219>;
#dma-cells = <1>;
dma-channels = <15>;
};
@@ -347,6 +361,7 @@
clocks = <&cpg CPG_MOD 218>;
clock-names = "fck";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 218>;
#dma-cells = <1>;
dma-channels = <15>;
};
@@ -376,6 +391,7 @@
clocks = <&cpg CPG_MOD 502>;
clock-names = "fck";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 502>;
#dma-cells = <1>;
dma-channels = <13>;
};
@@ -405,6 +421,7 @@
clocks = <&cpg CPG_MOD 501>;
clock-names = "fck";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 501>;
#dma-cells = <1>;
dma-channels = <13>;
};
@@ -418,6 +435,7 @@
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 931>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 931>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
@@ -430,6 +448,7 @@
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 930>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 930>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
@@ -442,6 +461,7 @@
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 929>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 929>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
@@ -454,6 +474,7 @@
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 928>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 928>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
@@ -466,6 +487,7 @@
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 927>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 927>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
@@ -479,6 +501,7 @@
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 925>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 925>;
i2c-scl-internal-delay-ns = <110>;
status = "disabled";
};
@@ -496,6 +519,7 @@
<&dmac1 0x77>, <&dmac1 0x78>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 926>;
status = "disabled";
};
@@ -511,6 +535,7 @@
<&dmac1 0x61>, <&dmac1 0x62>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 318>;
status = "disabled";
};
@@ -526,6 +551,7 @@
<&dmac1 0x65>, <&dmac1 0x66>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 323>;
status = "disabled";
};
@@ -544,6 +570,7 @@
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <195000000>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 314>;
status = "disabled";
};
@@ -557,6 +584,7 @@
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 312>;
status = "disabled";
};
@@ -570,6 +598,7 @@
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 311>;
status = "disabled";
};
@@ -582,6 +611,7 @@
<&dmac1 0xd1>, <&dmac1 0xd2>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 315>;
reg-io-width = <4>;
status = "disabled";
max-frequency = <97500000>;
@@ -598,6 +628,7 @@
<&dmac1 0x21>, <&dmac1 0x22>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 204>;
status = "disabled";
};
@@ -612,6 +643,7 @@
<&dmac1 0x25>, <&dmac1 0x26>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 203>;
status = "disabled";
};
@@ -626,6 +658,7 @@
<&dmac1 0x27>, <&dmac1 0x28>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 202>;
status = "disabled";
};
@@ -640,6 +673,7 @@
<&dmac1 0x1b>, <&dmac1 0x1c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 1106>;
status = "disabled";
};
@@ -654,6 +688,7 @@
<&dmac1 0x1f>, <&dmac1 0x20>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 1107>;
status = "disabled";
};
@@ -668,6 +703,7 @@
<&dmac1 0x23>, <&dmac1 0x24>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 1108>;
status = "disabled";
};
@@ -682,6 +718,7 @@
<&dmac1 0x3d>, <&dmac1 0x3e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 206>;
status = "disabled";
};
@@ -696,6 +733,7 @@
<&dmac1 0x19>, <&dmac1 0x1a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 207>;
status = "disabled";
};
@@ -710,6 +748,7 @@
<&dmac1 0x1d>, <&dmac1 0x1e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 216>;
status = "disabled";
};
@@ -725,6 +764,7 @@
<&dmac1 0x29>, <&dmac1 0x2a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 721>;
status = "disabled";
};
@@ -740,6 +780,7 @@
<&dmac1 0x2d>, <&dmac1 0x2e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 720>;
status = "disabled";
};
@@ -755,6 +796,7 @@
<&dmac1 0x2b>, <&dmac1 0x2c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 719>;
status = "disabled";
};
@@ -770,6 +812,7 @@
<&dmac1 0x2f>, <&dmac1 0x30>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 718>;
status = "disabled";
};
@@ -785,6 +828,7 @@
<&dmac1 0xfb>, <&dmac1 0xfc>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 715>;
status = "disabled";
};
@@ -800,6 +844,7 @@
<&dmac1 0xfd>, <&dmac1 0xfe>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 714>;
status = "disabled";
};
@@ -815,6 +860,7 @@
<&dmac1 0x39>, <&dmac1 0x3a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 717>;
status = "disabled";
};
@@ -830,6 +876,7 @@
<&dmac1 0x4d>, <&dmac1 0x4e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 716>;
status = "disabled";
};
@@ -845,6 +892,7 @@
<&dmac1 0x3b>, <&dmac1 0x3c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 713>;
status = "disabled";
};
@@ -872,6 +920,7 @@
interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 813>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 813>;
phy-mode = "rmii";
#address-cells = <1>;
#size-cells = <0>;
@@ -884,6 +933,7 @@
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 811>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 811>;
status = "disabled";
};
@@ -893,6 +943,7 @@
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 810>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 810>;
status = "disabled";
};
@@ -902,6 +953,7 @@
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 809>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 809>;
status = "disabled";
};
@@ -914,6 +966,7 @@
<&dmac1 0x17>, <&dmac1 0x18>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
@@ -958,6 +1011,7 @@
<&can_clk>;
clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 916>;
status = "disabled";
};
@@ -969,6 +1023,7 @@
<&can_clk>;
clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 915>;
status = "disabled";
};
@@ -1147,6 +1202,13 @@
"dvc.0", "dvc.1",
"clk_a", "clk_b", "clk_c", "clk_i";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 1005>,
+ <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
+ <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
+ <&cpg 1014>, <&cpg 1015>;
+ reset-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
+ "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
status = "disabled";
--
2.7.4
--
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^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 5/5] ARM: dts: r8a7794: Add reset control properties
2017-09-11 13:09 [PATCH 0/5] ARM: dts: rcar-gen2: Add reset control properties Geert Uytterhoeven
` (3 preceding siblings ...)
[not found] ` <1505135399-24840-1-git-send-email-geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
@ 2017-09-11 13:09 ` Geert Uytterhoeven
4 siblings, 0 replies; 7+ messages in thread
From: Geert Uytterhoeven @ 2017-09-11 13:09 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-renesas-soc, linux-arm-kernel, devicetree,
Geert Uytterhoeven
Add properties to describe the reset topology for on-SoC devices:
- Add the "#reset-cells" property to the CPG/MSSR device node,
- Add resets and reset-names properties to the various device nodes.
This allows to reset SoC devices using the Reset Controller API.
Note that resets usually match the corresponding module clocks.
Exceptions are:
- The audio module has resets for the Serial Sound Interfaces only,
- The display module has only a single reset for all DU channels, but
adding reset properties for the display is postponed.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7794.dtsi | 64 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 64 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index a4c35d29f77c16dc..035c33715b65a6b7 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -78,6 +78,7 @@
clocks = <&cpg CPG_MOD 408>;
clock-names = "clk";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 408>;
};
gpio0: gpio@e6050000 {
@@ -91,6 +92,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 912>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 912>;
};
gpio1: gpio@e6051000 {
@@ -104,6 +106,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 911>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 911>;
};
gpio2: gpio@e6052000 {
@@ -117,6 +120,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 910>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 910>;
};
gpio3: gpio@e6053000 {
@@ -130,6 +134,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 909>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 909>;
};
gpio4: gpio@e6054000 {
@@ -143,6 +148,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 908>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 908>;
};
gpio5: gpio@e6055000 {
@@ -156,6 +162,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 907>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 907>;
};
gpio6: gpio@e6055400 {
@@ -169,6 +176,7 @@
interrupt-controller;
clocks = <&cpg CPG_MOD 905>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 905>;
};
cmt0: timer@ffca0000 {
@@ -179,6 +187,7 @@
clocks = <&cpg CPG_MOD 124>;
clock-names = "fck";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 124>;
renesas,channels-mask = <0x60>;
@@ -199,6 +208,7 @@
clocks = <&cpg CPG_MOD 329>;
clock-names = "fck";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 329>;
renesas,channels-mask = <0xff>;
@@ -230,6 +240,7 @@
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 407>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 407>;
};
pfc: pin-controller@e6060000 {
@@ -264,6 +275,7 @@
clocks = <&cpg CPG_MOD 219>;
clock-names = "fck";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 219>;
#dma-cells = <1>;
dma-channels = <15>;
};
@@ -295,6 +307,7 @@
clocks = <&cpg CPG_MOD 218>;
clock-names = "fck";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 218>;
#dma-cells = <1>;
dma-channels = <15>;
};
@@ -323,6 +336,7 @@
clocks = <&cpg CPG_MOD 502>;
clock-names = "fck";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 502>;
#dma-cells = <1>;
dma-channels = <13>;
};
@@ -338,6 +352,7 @@
<&dmac1 0x21>, <&dmac1 0x22>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 204>;
status = "disabled";
};
@@ -352,6 +367,7 @@
<&dmac1 0x25>, <&dmac1 0x26>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 203>;
status = "disabled";
};
@@ -366,6 +382,7 @@
<&dmac1 0x27>, <&dmac1 0x28>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 202>;
status = "disabled";
};
@@ -380,6 +397,7 @@
<&dmac1 0x1b>, <&dmac1 0x1c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 1106>;
status = "disabled";
};
@@ -394,6 +412,7 @@
<&dmac1 0x1f>, <&dmac1 0x20>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 1107>;
status = "disabled";
};
@@ -408,6 +427,7 @@
<&dmac1 0x23>, <&dmac1 0x24>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 1108>;
status = "disabled";
};
@@ -422,6 +442,7 @@
<&dmac1 0x3d>, <&dmac1 0x3e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 206>;
status = "disabled";
};
@@ -436,6 +457,7 @@
<&dmac1 0x19>, <&dmac1 0x1a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 207>;
status = "disabled";
};
@@ -450,6 +472,7 @@
<&dmac1 0x1d>, <&dmac1 0x1e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 216>;
status = "disabled";
};
@@ -465,6 +488,7 @@
<&dmac1 0x29>, <&dmac1 0x2a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 721>;
status = "disabled";
};
@@ -480,6 +504,7 @@
<&dmac1 0x2d>, <&dmac1 0x2e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 720>;
status = "disabled";
};
@@ -495,6 +520,7 @@
<&dmac1 0x2b>, <&dmac1 0x2c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 719>;
status = "disabled";
};
@@ -510,6 +536,7 @@
<&dmac1 0x2f>, <&dmac1 0x30>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 718>;
status = "disabled";
};
@@ -525,6 +552,7 @@
<&dmac1 0xfb>, <&dmac1 0xfc>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 715>;
status = "disabled";
};
@@ -540,6 +568,7 @@
<&dmac1 0xfd>, <&dmac1 0xfe>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 714>;
status = "disabled";
};
@@ -555,6 +584,7 @@
<&dmac1 0x39>, <&dmac1 0x3a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 717>;
status = "disabled";
};
@@ -570,6 +600,7 @@
<&dmac1 0x4d>, <&dmac1 0x4e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 716>;
status = "disabled";
};
@@ -585,6 +616,7 @@
<&dmac1 0x3b>, <&dmac1 0x3c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 713>;
status = "disabled";
};
@@ -612,6 +644,7 @@
interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 813>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 813>;
phy-mode = "rmii";
#address-cells = <1>;
#size-cells = <0>;
@@ -625,6 +658,7 @@
interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 812>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 812>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -637,6 +671,7 @@
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 931>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 931>;
#address-cells = <1>;
#size-cells = <0>;
i2c-scl-internal-delay-ns = <6>;
@@ -649,6 +684,7 @@
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 930>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 930>;
#address-cells = <1>;
#size-cells = <0>;
i2c-scl-internal-delay-ns = <6>;
@@ -661,6 +697,7 @@
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 929>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 929>;
#address-cells = <1>;
#size-cells = <0>;
i2c-scl-internal-delay-ns = <6>;
@@ -673,6 +710,7 @@
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 928>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 928>;
#address-cells = <1>;
#size-cells = <0>;
i2c-scl-internal-delay-ns = <6>;
@@ -685,6 +723,7 @@
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 927>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 927>;
#address-cells = <1>;
#size-cells = <0>;
i2c-scl-internal-delay-ns = <6>;
@@ -697,6 +736,7 @@
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 925>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 925>;
#address-cells = <1>;
#size-cells = <0>;
i2c-scl-internal-delay-ns = <6>;
@@ -713,6 +753,7 @@
<&dmac1 0x61>, <&dmac1 0x62>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 318>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -728,6 +769,7 @@
<&dmac1 0x65>, <&dmac1 0x66>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 323>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -742,6 +784,7 @@
<&dmac1 0xd1>, <&dmac1 0xd2>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 315>;
reg-io-width = <4>;
status = "disabled";
};
@@ -756,6 +799,7 @@
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <195000000>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 314>;
status = "disabled";
};
@@ -769,6 +813,7 @@
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 312>;
status = "disabled";
};
@@ -782,6 +827,7 @@
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 311>;
status = "disabled";
};
@@ -794,6 +840,7 @@
<&dmac1 0x17>, <&dmac1 0x18>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
@@ -806,6 +853,7 @@
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 811>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 811>;
status = "disabled";
};
@@ -815,6 +863,7 @@
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 810>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 810>;
status = "disabled";
};
@@ -826,6 +875,7 @@
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
status = "disabled";
bus-range = <0 0>;
@@ -859,6 +909,7 @@
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
status = "disabled";
bus-range = <1 1>;
@@ -890,6 +941,7 @@
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 704>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 704>;
renesas,buswait = <4>;
phys = <&usb0 1>;
phy-names = "usb";
@@ -905,6 +957,7 @@
clocks = <&cpg CPG_MOD 704>;
clock-names = "usbhs";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 704>;
status = "disabled";
usb0: usb-channel@0 {
@@ -923,6 +976,7 @@
interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 131>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 131>;
};
vsp1@fe930000 {
@@ -931,6 +985,7 @@
interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 128>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 128>;
};
du: display@feb00000 {
@@ -968,6 +1023,7 @@
<&can_clk>;
clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 916>;
status = "disabled";
};
@@ -979,6 +1035,7 @@
<&can_clk>;
clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 915>;
status = "disabled";
};
@@ -1151,6 +1208,13 @@
"dvc.0", "dvc.1",
"clk_a", "clk_b", "clk_c", "clk_i";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 1005>,
+ <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
+ <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
+ <&cpg 1014>, <&cpg 1015>;
+ reset-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
+ "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
status = "disabled";
--
2.7.4
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 0/5] ARM: dts: rcar-gen2: Add reset control properties
[not found] ` <1505135399-24840-1-git-send-email-geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
2017-09-11 13:09 ` [PATCH 4/5] ARM: dts: r8a7793: " Geert Uytterhoeven
@ 2017-09-13 7:36 ` Simon Horman
1 sibling, 0 replies; 7+ messages in thread
From: Simon Horman @ 2017-09-13 7:36 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Magnus Damm, linux-renesas-soc-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA
On Mon, Sep 11, 2017 at 03:09:54PM +0200, Geert Uytterhoeven wrote:
> Hi Simon, Magnus,
>
> This patch series describes the reset topology on all R-Car Gen2 Socs, like
> was done before for R-Car Gen3 and RZ/G1.
>
> Resets usually match the corresponding module clocks. Exceptions are:
> - The audio module has resets for the Serial Sound Interfaces only,
> - The display module has only a single reset for all DU channels, but
> adding reset properties for the display is postponed upon request from
> Laurent.
>
> Note that this patch series contains hardware description only.
> Actual reset policy is to be defined and implemented separately.
> Also, this is an optional feature, to be enabled explicitly using
> CONFIG_RESET_CONTROLLER=y. When enabled, an on-SoC device can be reset
> easily using device_reset(), or by using the reset_control_*() API when
> more fine-grained control is desired.
>
> Possible use cases are (not exhaustive):
> - Reset a device before use, to make sure it's in a predefined state, and
> doesn't depend on earlier configuration by e.g. the boot loader,
> - Reset a device after detecting an anomaly,
> - Reset a device to verify suspend/resume is handled correctly by the
> driver in case the device would be part of a power domain on a
> different/future SoC.
>
> This has been tested on r8a7790/lager, r8a7791/koelsch, r8a7792/blanche,
> and r8a7794/alt (r8a7793/gose was offline).
>
> Thanks for applying!
>
> Geert Uytterhoeven (5):
> ARM: dts: r8a7790: Add reset control properties
> ARM: dts: r8a7791: Add reset control properties
> ARM: dts: r8a7792: Add reset control properties
> ARM: dts: r8a7793: Add reset control properties
> ARM: dts: r8a7794: Add reset control properties
Thanks, applied.
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^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2017-09-13 7:36 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-09-11 13:09 [PATCH 0/5] ARM: dts: rcar-gen2: Add reset control properties Geert Uytterhoeven
2017-09-11 13:09 ` [PATCH 1/5] ARM: dts: r8a7790: " Geert Uytterhoeven
2017-09-11 13:09 ` [PATCH 2/5] ARM: dts: r8a7791: " Geert Uytterhoeven
2017-09-11 13:09 ` [PATCH 3/5] ARM: dts: r8a7792: " Geert Uytterhoeven
[not found] ` <1505135399-24840-1-git-send-email-geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
2017-09-11 13:09 ` [PATCH 4/5] ARM: dts: r8a7793: " Geert Uytterhoeven
2017-09-13 7:36 ` [PATCH 0/5] ARM: dts: rcar-gen2: " Simon Horman
2017-09-11 13:09 ` [PATCH 5/5] ARM: dts: r8a7794: " Geert Uytterhoeven
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