[PATCH 00/13] ARM: dts: renesas: Add missing clocks for ARM CPU cores

[PATCH 00/13] ARM: dts: renesas: Add missing clocks for ARM CPU cores

[Geert Uytterhoeven]

	Hi Simon, Magnus,

This series improves DT hardware descriptions for Renesas arm32 SoCs by
adding missing clocks properties to the device nodes corresponding to
ARM CPU cores.

Notes:
  - This series should have no functional impact, except perhaps on
    big.LITTLE SoCs, when using a firmware that enables both big and
    little CPU cores (see also Sudeep Holla's comments for R-Car Gen3 in
    "Re: [PATCH v2 2/2] arm64: dts: r8a7796: Add OPPs table for cpu
    devices" (https://www.spinics.net/lists/arm-kernel/msg610489.html),
  - The clocks for CA9 CPU cores on R-Mobile A1 and EMMA Mobile EV2 are
    still missing, as these clocks are not supported by the DT bindings
    and drivers, and cannot be referenced yet.

Tested on r8a73a4/ape6evm, r8a7791/koelsch, and sh73a0/kzm9g.

Testing on r8a7790/lager would be appreciated.

Thanks for your comments!

Geert Uytterhoeven (13):
  dt-bindings: clk: r7s72100: Add missing I and G clocks
  ARM: dts: r7s72100: Add clock for CA9 CPU core
  ARM: dts: r8a73a4: Add clock for CA15 CPU0 core
  ARM: dts: r8a7743: Add missing clock for secondary CA15 CPU core
  ARM: dts: r8a7778: Add clock for CA9 CPU core
  ARM: dts: r8a7779: Add clocks for CA9 CPU cores
  ARM: dts: r8a7790: Add missing clocks for secondary CA15 CPU cores
  ARM: dts: r8a7790: Add clocks for CA7 CPU cores
  ARM: dts: r8a7791: Add missing clock for secondary CA15 CPU core
  ARM: dts: r8a7792: Add missing clock for secondary CA15 CPU core
  ARM: dts: r8a7793: Add missing clock for secondary CA15 CPU core
  ARM: dts: r8a7794: Add missing clock for secondary CA7 CPU core
  ARM: dts: sh73a0: Add clocks for CA9 CPU cores

 arch/arm/boot/dts/r7s72100.dtsi            | 1 +
 arch/arm/boot/dts/r8a73a4.dtsi             | 1 +
 arch/arm/boot/dts/r8a7743.dtsi             | 1 +
 arch/arm/boot/dts/r8a7778.dtsi             | 1 +
 arch/arm/boot/dts/r8a7779.dtsi             | 4 ++++
 arch/arm/boot/dts/r8a7790.dtsi             | 7 +++++++
 arch/arm/boot/dts/r8a7791.dtsi             | 1 +
 arch/arm/boot/dts/r8a7792.dtsi             | 1 +
 arch/arm/boot/dts/r8a7793.dtsi             | 1 +
 arch/arm/boot/dts/r8a7794.dtsi             | 1 +
 arch/arm/boot/dts/sh73a0.dtsi              | 2 ++
 include/dt-bindings/clock/r7s72100-clock.h | 2 ++
 12 files changed, 23 insertions(+)

-- 
2.7.4

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

[PATCH 01/13] dt-bindings: clk: r7s72100: Add missing I and G clocks

[Geert Uytterhoeven]

Add the missing definitions for the I (CPU) and G (Image Processing)
clocks, so these clocks can be referred to from device nodes in DT.

Note that these clocks are already fully supported otherwise (DT
bindings, Linux driver, r7s72100.dtsi), they were just omitted from the
header file.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 include/dt-bindings/clock/r7s72100-clock.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/dt-bindings/clock/r7s72100-clock.h b/include/dt-bindings/clock/r7s72100-clock.h
index 7dd8bc0c3cd0d6e2..0dcb3e87d44c121e 100644
--- a/include/dt-bindings/clock/r7s72100-clock.h
+++ b/include/dt-bindings/clock/r7s72100-clock.h
@@ -11,6 +11,8 @@
 #define __DT_BINDINGS_CLOCK_R7S72100_H__
 
 #define R7S72100_CLK_PLL	0
+#define R7S72100_CLK_I		1
+#define R7S72100_CLK_G		2
 
 /* MSTP2 */
 #define R7S72100_CLK_CORESIGHT	0
-- 
2.7.4

[PATCH 05/13] ARM: dts: r8a7778: Add clock for CA9 CPU core

[Geert Uytterhoeven]

Improve hardware description by adding a clock property to the device
node corresponding to the CA9 CPU core.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm/boot/dts/r8a7778.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
index 8f3156c0e5754b09..0f98629a730f6b4f 100644
--- a/arch/arm/boot/dts/r8a7778.dtsi
+++ b/arch/arm/boot/dts/r8a7778.dtsi
@@ -33,6 +33,7 @@
 			compatible = "arm,cortex-a9";
 			reg = <0>;
 			clock-frequency = <800000000>;
+			clocks = <&z_clk>;
 		};
 	};
 
-- 
2.7.4

[PATCH 02/13] ARM: dts: r7s72100: Add clock for CA9 CPU core

[Geert Uytterhoeven]

Improve hardware description by adding a clock property to the device
node corresponding to the CA9 CPU core.

Signed-off-by: Geert Uytterhoeven <geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
---
 arch/arm/boot/dts/r7s72100.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index 4ed12a4d9d513821..ab9645a42eca3811 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -203,6 +203,7 @@
 			compatible = "arm,cortex-a9";
 			reg = <0>;
 			clock-frequency = <400000000>;
+			clocks = <&cpg_clocks R7S72100_CLK_I>;
 			next-level-cache = <&L2>;
 		};
 	};
-- 
2.7.4

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 03/13] ARM: dts: r8a73a4: Add clock for CA15 CPU0 core

[Geert Uytterhoeven]

Improve hardware description by adding a clocks property to the device
node corresponding to the primary CA15 CPU core, which is for now the
only one described.

Signed-off-by: Geert Uytterhoeven <geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
---
 arch/arm/boot/dts/r8a73a4.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
index f39a94fb36664906..8e48090e4fdc1412 100644
--- a/arch/arm/boot/dts/r8a73a4.dtsi
+++ b/arch/arm/boot/dts/r8a73a4.dtsi
@@ -27,6 +27,7 @@
 			device_type = "cpu";
 			compatible = "arm,cortex-a15";
 			reg = <0>;
+			clocks = <&cpg_clocks R8A73A4_CLK_Z>;
 			clock-frequency = <1500000000>;
 			power-domains = <&pd_a2sl>;
 			next-level-cache = <&L2_CA15>;
-- 
2.7.4

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 04/13] ARM: dts: r8a7743: Add missing clock for secondary CA15 CPU core

[Geert Uytterhoeven]

Currently only the primary CPU in the CA15 cluster has a clocks
property, while the secondary CPU core is driven by the same clock.
Add the missing clocks property to fix this.

Signed-off-by: Geert Uytterhoeven <geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
---
 arch/arm/boot/dts/r8a7743.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index d541fd9ffafb34ce..e09517bce30db2e8 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -63,6 +63,7 @@
 			compatible = "arm,cortex-a15";
 			reg = <1>;
 			clock-frequency = <1500000000>;
+			clocks = <&cpg CPG_CORE R8A7743_CLK_Z>;
 			power-domains = <&sysc R8A7743_PD_CA15_CPU1>;
 			next-level-cache = <&L2_CA15>;
 		};
-- 
2.7.4

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

RE: [PATCH 04/13] ARM: dts: r8a7743: Add missing clock for secondary CA15 CPU core

[Chris Paterson]

Hello Geert,

> From: linux-renesas-soc-owner@vger.kernel.org [mailto:linux-renesas-soc-
> owner@vger.kernel.org] On Behalf Of Geert Uytterhoeven
> Sent: 12 October 2017 10:35
> 
> Currently only the primary CPU in the CA15 cluster has a clocks property,
> while the secondary CPU core is driven by the same clock.
> Add the missing clocks property to fix this.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Looks okay to me, thanks.

Reviewed-by: Chris Paterson <chris.paterson2@renesas.com

> ---
>  arch/arm/boot/dts/r8a7743.dtsi | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/boot/dts/r8a7743.dtsi
> b/arch/arm/boot/dts/r8a7743.dtsi index
> d541fd9ffafb34ce..e09517bce30db2e8 100644
> --- a/arch/arm/boot/dts/r8a7743.dtsi
> +++ b/arch/arm/boot/dts/r8a7743.dtsi
> @@ -63,6 +63,7 @@
>  			compatible = "arm,cortex-a15";
>  			reg = <1>;
>  			clock-frequency = <1500000000>;
> +			clocks = <&cpg CPG_CORE R8A7743_CLK_Z>;
>  			power-domains = <&sysc R8A7743_PD_CA15_CPU1>;
>  			next-level-cache = <&L2_CA15>;
>  		};
> --
> 2.7.4

[PATCH 06/13] ARM: dts: r8a7779: Add clocks for CA9 CPU cores

[Geert Uytterhoeven]

Improve hardware description by adding clocks properties to the device
nodes corresponding to the CA9 CPU cores.

Signed-off-by: Geert Uytterhoeven <geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
---
 arch/arm/boot/dts/r8a7779.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
index 8ee0b2ca5d39a265..2cc9be4c13cda333 100644
--- a/arch/arm/boot/dts/r8a7779.dtsi
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -29,12 +29,14 @@
 			compatible = "arm,cortex-a9";
 			reg = <0>;
 			clock-frequency = <1000000000>;
+			clocks = <&cpg_clocks R8A7779_CLK_Z>;
 		};
 		cpu@1 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			reg = <1>;
 			clock-frequency = <1000000000>;
+			clocks = <&cpg_clocks R8A7779_CLK_Z>;
 			power-domains = <&sysc R8A7779_PD_ARM1>;
 		};
 		cpu@2 {
@@ -42,6 +44,7 @@
 			compatible = "arm,cortex-a9";
 			reg = <2>;
 			clock-frequency = <1000000000>;
+			clocks = <&cpg_clocks R8A7779_CLK_Z>;
 			power-domains = <&sysc R8A7779_PD_ARM2>;
 		};
 		cpu@3 {
@@ -49,6 +52,7 @@
 			compatible = "arm,cortex-a9";
 			reg = <3>;
 			clock-frequency = <1000000000>;
+			clocks = <&cpg_clocks R8A7779_CLK_Z>;
 			power-domains = <&sysc R8A7779_PD_ARM3>;
 		};
 	};
-- 
2.7.4

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 07/13] ARM: dts: r8a7790: Add missing clocks for secondary CA15 CPU cores

[Geert Uytterhoeven]

Currently only the primary CPU in the CA15 cluster has a clocks
property, while the secondary CPU cores are driven by the same clock.
Add the missing clocks properties to fix this.

Signed-off-by: Geert Uytterhoeven <geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
---
 arch/arm/boot/dts/r8a7790.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index ffa57bfe4873415c..7f86cb9f634fbed7 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -71,6 +71,7 @@
 			compatible = "arm,cortex-a15";
 			reg = <1>;
 			clock-frequency = <1300000000>;
+			clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
 			power-domains = <&sysc R8A7790_PD_CA15_CPU1>;
 			next-level-cache = <&L2_CA15>;
 		};
@@ -80,6 +81,7 @@
 			compatible = "arm,cortex-a15";
 			reg = <2>;
 			clock-frequency = <1300000000>;
+			clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
 			power-domains = <&sysc R8A7790_PD_CA15_CPU2>;
 			next-level-cache = <&L2_CA15>;
 		};
@@ -89,6 +91,7 @@
 			compatible = "arm,cortex-a15";
 			reg = <3>;
 			clock-frequency = <1300000000>;
+			clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
 			power-domains = <&sysc R8A7790_PD_CA15_CPU3>;
 			next-level-cache = <&L2_CA15>;
 		};
-- 
2.7.4

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 07/13] ARM: dts: r8a7790: Add missing clocks for secondary CA15 CPU cores

[Simon Horman]

On Thu, Oct 12, 2017 at 11:35:10AM +0200, Geert Uytterhoeven wrote:
> Currently only the primary CPU in the CA15 cluster has a clocks
> property, while the secondary CPU cores are driven by the same clock.
> Add the missing clocks properties to fix this.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Tested-by: Simon Horman <horms+renesas@verge.net.au>

[PATCH 08/13] ARM: dts: r8a7790: Add clocks for CA7 CPU cores

[Geert Uytterhoeven]

Currently only the CPU cores in the CA15 cluster have clocks properties.
Add the missing clocks properties for the CPU cores in the CA7 cluster
to fix this.

Signed-off-by: Geert Uytterhoeven <geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
---
 arch/arm/boot/dts/r8a7790.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 7f86cb9f634fbed7..0a2cec636b10a3e1 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -101,6 +101,7 @@
 			compatible = "arm,cortex-a7";
 			reg = <0x100>;
 			clock-frequency = <780000000>;
+			clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
 			power-domains = <&sysc R8A7790_PD_CA7_CPU0>;
 			next-level-cache = <&L2_CA7>;
 		};
@@ -110,6 +111,7 @@
 			compatible = "arm,cortex-a7";
 			reg = <0x101>;
 			clock-frequency = <780000000>;
+			clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
 			power-domains = <&sysc R8A7790_PD_CA7_CPU1>;
 			next-level-cache = <&L2_CA7>;
 		};
@@ -119,6 +121,7 @@
 			compatible = "arm,cortex-a7";
 			reg = <0x102>;
 			clock-frequency = <780000000>;
+			clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
 			power-domains = <&sysc R8A7790_PD_CA7_CPU2>;
 			next-level-cache = <&L2_CA7>;
 		};
@@ -128,6 +131,7 @@
 			compatible = "arm,cortex-a7";
 			reg = <0x103>;
 			clock-frequency = <780000000>;
+			clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
 			power-domains = <&sysc R8A7790_PD_CA7_CPU3>;
 			next-level-cache = <&L2_CA7>;
 		};
-- 
2.7.4

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 08/13] ARM: dts: r8a7790: Add clocks for CA7 CPU cores

[Simon Horman]

On Thu, Oct 12, 2017 at 11:35:11AM +0200, Geert Uytterhoeven wrote:
> Currently only the CPU cores in the CA15 cluster have clocks properties.
> Add the missing clocks properties for the CPU cores in the CA7 cluster
> to fix this.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>

Tested-by: Simon Horman <horms+renesas-/R6kz+dDXgpPR4JQBCEnsQ@public.gmane.org>

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 09/13] ARM: dts: r8a7791: Add missing clock for secondary CA15 CPU core

[Geert Uytterhoeven]

Currently only the primary CPU in the CA15 cluster has a clocks
property, while the secondary CPU core is driven by the same clock.
Add the missing clocks property to fix this.

Signed-off-by: Geert Uytterhoeven <geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
---
 arch/arm/boot/dts/r8a7791.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 842592f12f428399..af97792c9fddd970 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -70,6 +70,7 @@
 			compatible = "arm,cortex-a15";
 			reg = <1>;
 			clock-frequency = <1500000000>;
+			clocks = <&cpg CPG_CORE R8A7791_CLK_Z>;
 			power-domains = <&sysc R8A7791_PD_CA15_CPU1>;
 			next-level-cache = <&L2_CA15>;
 		};
-- 
2.7.4

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 10/13] ARM: dts: r8a7792: Add missing clock for secondary CA15 CPU core

[Geert Uytterhoeven]

Currently only the primary CPU in the CA15 cluster has a clocks
property, while the secondary CPU core is driven by the same clock.
Add the missing clocks property to fix this.

Signed-off-by: Geert Uytterhoeven <geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
---
 arch/arm/boot/dts/r8a7792.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index 549eafe8ff129edc..00bf1bec03d0a10f 100644
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi
@@ -56,6 +56,7 @@
 			compatible = "arm,cortex-a15";
 			reg = <1>;
 			clock-frequency = <1000000000>;
+			clocks = <&cpg CPG_CORE R8A7792_CLK_Z>;
 			power-domains = <&sysc R8A7792_PD_CA15_CPU1>;
 			next-level-cache = <&L2_CA15>;
 		};
-- 
2.7.4

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 13/13] ARM: dts: sh73a0: Add clocks for CA9 CPU cores

[Geert Uytterhoeven]

Improve hardware description by adding clocks properties to the device
nodes corresponding to the CA9 CPU cores.

Signed-off-by: Geert Uytterhoeven <geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
---
 arch/arm/boot/dts/sh73a0.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index f841895e5adc615a..a074106839a62e37 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -27,6 +27,7 @@
 			compatible = "arm,cortex-a9";
 			reg = <0>;
 			clock-frequency = <1196000000>;
+			clocks = <&cpg_clocks SH73A0_CLK_Z>;
 			power-domains = <&pd_a2sl>;
 			next-level-cache = <&L2>;
 		};
@@ -35,6 +36,7 @@
 			compatible = "arm,cortex-a9";
 			reg = <1>;
 			clock-frequency = <1196000000>;
+			clocks = <&cpg_clocks SH73A0_CLK_Z>;
 			power-domains = <&pd_a2sl>;
 			next-level-cache = <&L2>;
 		};
-- 
2.7.4

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 00/13] ARM: dts: renesas: Add missing clocks for ARM CPU cores

[Simon Horman]

On Thu, Oct 12, 2017 at 11:35:03AM +0200, Geert Uytterhoeven wrote:
> 	Hi Simon, Magnus,
> 
> This series improves DT hardware descriptions for Renesas arm32 SoCs by
> adding missing clocks properties to the device nodes corresponding to
> ARM CPU cores.
> 
> Notes:
>   - This series should have no functional impact, except perhaps on
>     big.LITTLE SoCs, when using a firmware that enables both big and
>     little CPU cores (see also Sudeep Holla's comments for R-Car Gen3 in
>     "Re: [PATCH v2 2/2] arm64: dts: r8a7796: Add OPPs table for cpu
>     devices" (https://www.spinics.net/lists/arm-kernel/msg610489.html),
>   - The clocks for CA9 CPU cores on R-Mobile A1 and EMMA Mobile EV2 are
>     still missing, as these clocks are not supported by the DT bindings
>     and drivers, and cannot be referenced yet.
> 
> Tested on r8a73a4/ape6evm, r8a7791/koelsch, and sh73a0/kzm9g.
> 
> Testing on r8a7790/lager would be appreciated.
> 
> Thanks for your comments!
> 
> Geert Uytterhoeven (13):
>   dt-bindings: clk: r7s72100: Add missing I and G clocks
>   ARM: dts: r7s72100: Add clock for CA9 CPU core
>   ARM: dts: r8a73a4: Add clock for CA15 CPU0 core
>   ARM: dts: r8a7743: Add missing clock for secondary CA15 CPU core
>   ARM: dts: r8a7778: Add clock for CA9 CPU core
>   ARM: dts: r8a7779: Add clocks for CA9 CPU cores
>   ARM: dts: r8a7790: Add missing clocks for secondary CA15 CPU cores
>   ARM: dts: r8a7790: Add clocks for CA7 CPU cores
>   ARM: dts: r8a7791: Add missing clock for secondary CA15 CPU core
>   ARM: dts: r8a7792: Add missing clock for secondary CA15 CPU core
>   ARM: dts: r8a7793: Add missing clock for secondary CA15 CPU core
>   ARM: dts: r8a7794: Add missing clock for secondary CA7 CPU core
>   ARM: dts: sh73a0: Add clocks for CA9 CPU cores

Thanks,

I have applied the above for v4.15. There was some fuzz when applying the
r8a7790 patches so please check that what I have is correct after I push
the next branch of the renesas tree a little later day.

> 
>  arch/arm/boot/dts/r7s72100.dtsi            | 1 +
>  arch/arm/boot/dts/r8a73a4.dtsi             | 1 +
>  arch/arm/boot/dts/r8a7743.dtsi             | 1 +
>  arch/arm/boot/dts/r8a7778.dtsi             | 1 +
>  arch/arm/boot/dts/r8a7779.dtsi             | 4 ++++
>  arch/arm/boot/dts/r8a7790.dtsi             | 7 +++++++
>  arch/arm/boot/dts/r8a7791.dtsi             | 1 +
>  arch/arm/boot/dts/r8a7792.dtsi             | 1 +
>  arch/arm/boot/dts/r8a7793.dtsi             | 1 +
>  arch/arm/boot/dts/r8a7794.dtsi             | 1 +
>  arch/arm/boot/dts/sh73a0.dtsi              | 2 ++
>  include/dt-bindings/clock/r7s72100-clock.h | 2 ++
>  12 files changed, 23 insertions(+)
> 
> -- 
> 2.7.4
> 
> Gr{oetje,eeting}s,
> 
> 						Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> 							    -- Linus Torvalds
> 
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 11/13] ARM: dts: r8a7793: Add missing clock for secondary CA15 CPU core

[Geert Uytterhoeven]

Currently only the primary CPU in the CA15 cluster has a clocks
property, while the secondary CPU core is driven by the same clock.
Add the missing clocks property to fix this.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm/boot/dts/r8a7793.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index af91c88e3b5b2482..33a1b79f9b25f30c 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -62,6 +62,7 @@
 			compatible = "arm,cortex-a15";
 			reg = <1>;
 			clock-frequency = <1500000000>;
+			clocks = <&cpg CPG_CORE R8A7793_CLK_Z>;
 			power-domains = <&sysc R8A7793_PD_CA15_CPU1>;
 		};
 
-- 
2.7.4

[PATCH 12/13] ARM: dts: r8a7794: Add missing clock for secondary CA7 CPU core

[Geert Uytterhoeven]

Currently only the primary CPU in the CA7 cluster has a clocks property,
while the secondary CPU core is driven by the same clock.
Add the missing clocks property to fix this.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm/boot/dts/r8a7794.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 4fd92e989e227270..b588029ae9db8957 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -54,6 +54,7 @@
 			compatible = "arm,cortex-a7";
 			reg = <1>;
 			clock-frequency = <1000000000>;
+			clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>;
 			power-domains = <&sysc R8A7794_PD_CA7_CPU1>;
 			next-level-cache = <&L2_CA7>;
 		};
-- 
2.7.4