From: Vidya Sagar <vidyas-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
To: treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org
Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
kthota-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
mmaddireddy-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
vidyas-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: [PATCH V2 3/7] ARM: tegra: limit PCIe config space mapping to 4K for T30
Date: Mon, 23 Oct 2017 20:05:08 +0530 [thread overview]
Message-ID: <1508769312-12465-4-git-send-email-vidyas@nvidia.com> (raw)
In-Reply-To: <1508769312-12465-1-git-send-email-vidyas-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
reduces PCIe config space mapping size from its current
256MB to 4K to have only 4K of virtual memory mapping and to be
in line with driver implementation
Signed-off-by: Vidya Sagar <vidyas-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
V2:
* no changes in this patch
arch/arm/boot/dts/tegra30.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 13960fda7471..b23171f2b86f 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -15,7 +15,7 @@
device_type = "pci";
reg = <0x00003000 0x00000800 /* PADS registers */
0x00003800 0x00000200 /* AFI registers */
- 0x10000000 0x10000000>; /* configuration space */
+ 0x1FFFF000 0x00001000>; /* configuration space */
reg-names = "pads", "afi", "cs";
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH /* controller interrupt */
GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
--
2.7.4
next prev parent reply other threads:[~2017-10-23 14:35 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-23 14:35 [PATCH V2 0/7] Tegra PCIe end point config space map code refactoring Vidya Sagar
[not found] ` <1508769312-12465-1-git-send-email-vidyas-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2017-10-23 14:35 ` [PATCH V2 1/7] PCI: tegra: refactor config space mapping code Vidya Sagar
2017-10-23 14:35 ` [PATCH V2 2/7] ARM: tegra: limit PCIe config space mapping to 4K for T20 Vidya Sagar
2017-10-23 14:35 ` Vidya Sagar [this message]
2017-10-23 14:35 ` [PATCH V2 4/7] ARM: tegra: limit PCIe config space mapping to 4K for T124 Vidya Sagar
2017-10-23 14:35 ` [PATCH V2 5/7] ARM64: tegra: limit PCIe config space mapping to 4K for T132 Vidya Sagar
2017-10-23 14:35 ` [PATCH V2 6/7] ARM64: tegra: limit PCIe config space mapping to 4K for T210 Vidya Sagar
2017-10-23 15:10 ` [PATCH V2 0/7] Tegra PCIe end point config space map code refactoring Rob Herring
[not found] ` <CAL_Jsq+3UAwk5gNgh=s6O1f-MadyGCtADX7pyzX8eUfBqboRfA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-10-23 15:24 ` Vidya Sagar
2017-10-23 16:16 ` Mikko Perttunen
[not found] ` <1c898f3e-582f-27fe-7e01-f52a8b8ad538-/1wQRMveznE@public.gmane.org>
2017-10-23 17:13 ` Vidya Sagar
2017-10-23 14:35 ` [PATCH V2 7/7] ARM64: tegra: limit PCIe config space mapping to 4K for T186 Vidya Sagar
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