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From: Ludovic Barre <ludovic.Barre-qxv4g6HH51o@public.gmane.org>
To: Thomas Gleixner <tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>,
	Jason Cooper <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org>,
	Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>,
	Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: Maxime Coquelin
	<mcoquelin.stm32-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Alexandre Torgue <alexandre.torgue-qxv4g6HH51o@public.gmane.org>,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: [PATCH v2 6/9] irqchip: stm32: move the wakeup on interrupt mask
Date: Wed, 25 Oct 2017 19:11:02 +0200	[thread overview]
Message-ID: <1508951465-17152-7-git-send-email-ludovic.Barre@st.com> (raw)
In-Reply-To: <1508951465-17152-1-git-send-email-ludovic.Barre-qxv4g6HH51o@public.gmane.org>

From: Ludovic Barre <ludovic.barre-qxv4g6HH51o@public.gmane.org>

Move irq_set_wake on interrupt mask, needed to wake up from
low power mode as the event mask is not able to do so.

Signed-off-by: Ludovic Barre <ludovic.barre-qxv4g6HH51o@public.gmane.org>
---
 drivers/irqchip/irq-stm32-exti.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq-stm32-exti.c
index 9715d57..3e4ee25 100644
--- a/drivers/irqchip/irq-stm32-exti.c
+++ b/drivers/irqchip/irq-stm32-exti.c
@@ -156,16 +156,16 @@ static int stm32_irq_set_wake(struct irq_data *data, unsigned int on)
 	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data);
 	const struct stm32_exti_bank *stm32_bank = gc->private;
 	int pin = data->hwirq % IRQS_PER_BANK;
-	u32 emr;
+	u32 imr;
 
 	irq_gc_lock(gc);
 
-	emr = irq_reg_readl(gc, stm32_bank->emr_ofst);
+	imr = irq_reg_readl(gc, stm32_bank->imr_ofst);
 	if (on)
-		emr |= BIT(pin);
+		imr |= BIT(pin);
 	else
-		emr &= ~BIT(pin);
-	irq_reg_writel(gc, emr, stm32_bank->emr_ofst);
+		imr &= ~BIT(pin);
+	irq_reg_writel(gc, imr, stm32_bank->imr_ofst);
 
 	irq_gc_unlock(gc);
 
-- 
2.7.4

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  parent reply	other threads:[~2017-10-25 17:11 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-25 17:10 [PATCH v2 0/9] irqchip: stm32: add stm32h7 support Ludovic Barre
2017-10-25 17:10 ` [PATCH v2 1/9] irqchip: stm32: select GENERIC_IRQ_CHIP Ludovic Barre
2017-10-25 17:10 ` [PATCH v2 2/9] irqchip: stm32: add multi-bank management Ludovic Barre
     [not found]   ` <1508951465-17152-3-git-send-email-ludovic.Barre-qxv4g6HH51o@public.gmane.org>
2017-10-26 14:36     ` Julien Thierry
2017-10-27  8:10       ` Ludovic BARRE
2017-10-25 17:10 ` [PATCH v2 3/9] dt-bindings: interrupt-controllers: add compatible string for stm32h7 Ludovic Barre
2017-10-27 14:37   ` Rob Herring
2017-10-25 17:11 ` [PATCH v2 4/9] irqchip: stm32: add stm32h7 support Ludovic Barre
2017-10-25 17:11 ` [PATCH v2 7/9] ARM: dts: stm32: add exti support for stm32h743 Ludovic Barre
2017-10-25 17:11 ` [PATCH v2 8/9] ARM: dts: stm32: add system config bank node " Ludovic Barre
     [not found] ` <1508951465-17152-1-git-send-email-ludovic.Barre-qxv4g6HH51o@public.gmane.org>
2017-10-25 17:11   ` [PATCH v2 5/9] irqchip: stm32: fix initial values Ludovic Barre
2017-10-25 17:11   ` Ludovic Barre [this message]
2017-10-25 17:11   ` [PATCH v2 9/9] ARM: dts: stm32: add support of exti on stm32h743 pinctrl Ludovic Barre

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