devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
* [PATCH v3 0/4] fix the clock setting for SAR ADC
@ 2017-11-07  5:36 Yixun Lan
  2017-11-07 11:03 ` Jerome Brunet
  0 siblings, 1 reply; 2+ messages in thread
From: Yixun Lan @ 2017-11-07  5:36 UTC (permalink / raw)
  To: Neil Armstrong, Jerome Brunet, Martin Blumenstingl, devicetree
  Cc: Michael Turquette, Stephen Boyd, Carlo Caione, Kevin Hilman,
	Yixun Lan, Xingyu Chen, linux-amlogic, linux-clk,
	linux-arm-kernel, linux-kernel

patch [1/4]:
  Fix wrong SARADC/SANA clock gate bit in Meson-GXBB/GXL,
the published datasheet also has wrong description about this.

patch [2-4/4]:
  Drop the "sana" clock from SAR ADC module,

  From the hardware perspective, the SAR ADC module doesn't
require "sana" clock to wrok. This should apply to all SoC,
including meson6,8, GXBB, GXL..

Note: the whole patchset series has been tested at GXL-P212 board,
we haven't got any meson6,8 board to test, so I would appreciate
if someone (Martin?) could help to confirm it works there.
 
Changes since v2 at [2] :
  - explicitly point out 'sana' clock is not required for saradc, and drop them
  - update comments, as the published datasheet is wrong
 
Changes since v1 at [1] :
  - correct SAR ADC/SANA clock gate bit

[1] http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005221.html
[2] http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005242.html


Xingyu Chen (3):
  iio: adc: meson-saradc: remove irrelevant clock "sana"
  dt-bindings: iio: adc: update the doc for SAR ADC
  ARM64: dts: meson: drop "sana" clock from SAR ADC

Yixun Lan (1):
  clk: meson: gxbb: fix wrong clock for SARADC/SANA

 .../bindings/iio/adc/amlogic,meson-saradc.txt        |  1 -
 arch/arm/boot/dts/meson8.dtsi                        |  5 ++---
 arch/arm/boot/dts/meson8b.dtsi                       |  5 ++---
 arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi          |  3 +--
 arch/arm64/boot/dts/amlogic/meson-gxl.dtsi           |  3 +--
 drivers/clk/meson/gxbb.c                             |  4 ++--
 drivers/iio/adc/meson_saradc.c                       | 20 --------------------
 7 files changed, 8 insertions(+), 33 deletions(-)

-- 
2.14.1


^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2017-11-07 11:03 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-11-07  5:36 [PATCH v3 0/4] fix the clock setting for SAR ADC Yixun Lan
2017-11-07 11:03 ` Jerome Brunet

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).