Re: [PATCH 3/3] ARM64: dts: meson-axg: add PWM DT info for Meson-Axg SoC

[Jerome Brunet <jbrunet-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>]

On Mon, 2017-12-04 at 10:17 +0100, Jerome Brunet wrote:
> On Mon, 2017-12-04 at 14:00 +0800, Yixun Lan wrote:
> > From: Jian Hu <jian.hu-LpR1jeaWuhtBDgjK7y7TUQ@public.gmane.org>
> > 
> > Add PWM DT info for the Amlogic's Meson-Axg SoC.
> > 
> > Signed-off-by: Jian Hu <jian.hu-LpR1jeaWuhtBDgjK7y7TUQ@public.gmane.org>
> > Signed-off-by: Yixun Lan <yixun.lan-LpR1jeaWuhtBDgjK7y7TUQ@public.gmane.org>
> > ---
> >  arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 120
> > +++++++++++++++++++++++++++++
> >  1 file changed, 120 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> > b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> > index 92f65eec3e18..f7f228701df1 100644
> > --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> > +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> > @@ -177,6 +177,24 @@
> > 
> 
> [...]
> 
> > 
> > @@ -435,6 +537,24 @@
> >  				clock-names = "clk_i2c";
> >  			};
> >  
> > +			pwm_AO_ab: pwm@7000 {
> > +				compatible = "amlogic,meson-axg-ao-pwm";
> > +				reg = <0x0 0x07000 0x0 0x20>;
> > +				#pwm-cells = <3>;
> > +				clocks = <&xtal>, <&xtal>;
> > +				clock-names = "clkin0", "clkin1";
> 
> like gxbb, "amlogic,meson-axg-ao-pwm" does not have such clock bindings,
> Later on, if we want to "correctly" get the clock from DT, it will have to
> gothrough a new compatible, I guess. 

Please ignore this comment (monday morning...)
However clock bindings for this should be defined in the board dts, not the soc
one 

> 
> > +				status = "disabled";
> > +			};
> > +
> > +			pwm_AO_cd: pwm@2000 {
> > +				compatible = "amlogic,axg-ao-pwm";
> > +				reg = <0x0 0x02000  0x0 0x20>;
> > +				#pwm-cells = <3>;
> > +				clocks = <&xtal>, <&xtal>;
> > +				clock-names = "clkin0", "clkin1";
> > +				status = "disabled";
> > +			};
> > +
> >  			uart_AO: serial@3000 {
> >  				compatible = "amlogic,meson-gx-uart",
> > "amlogic,meson-ao-uart";
> >  				reg = <0x0 0x3000 0x0 0x18>;
> 
> 

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