Re: [PATCH] Documentation: binding: Update endianness usage

[Scott Wood <oss-fOR+EgIDQEHk1uMJSBkQmQ@public.gmane.org>]

On Tue, 2017-12-05 at 09:45 +0000, Prabhakar Kushwaha wrote:
> > -----Original Message-----
> > From: Scott Wood [mailto:oss-fOR+EgIDQEHk1uMJSBkQmQ@public.gmane.org]
> > Sent: Tuesday, December 05, 2017 8:16 AM
> > To: Prabhakar Kushwaha <prabhakar.kushwaha-3arQi8VN3Tc@public.gmane.org>; linux-
> > mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org; devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> > Cc: dedekind1-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org; computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
> > Subject: Re: [PATCH] Documentation: binding: Update endianness usage
> > 
> > I now see your patch to of_flash_probe... where is the non-IFC-specific
> > binding that says the *parent* of a CFI node should be looked at for this?
> > Where in general are endian properties kept in the parent of the node with
> > "reg"?  The right answer is to add endianness to mtd-physmap.txt.
> > 
> 
> Flashes are always littler endian. 

We wouldn't be having this discussion if that were true...  This is about how
it presents to the CPU, not about how the actual pins on the chip are
numbered.

> It is because of IFC controller behavior, endianness is required.  
> So as per my understanding, this info should go in IFC binding. 

If the info should go in the IFC binding why is the code in a non-IFC-specific 
place?

-Scott

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