From: Tero Kristo <t-kristo-l0cyMroinI0@public.gmane.org>
To: tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org,
bcousson-rdvid1DuHRBWk0Htik3J/w@public.gmane.org
Cc: linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: [PATCH 17/20] ARM: dts: am33xx: add clkctrl nodes
Date: Thu, 7 Dec 2017 10:46:50 +0200 [thread overview]
Message-ID: <1512636413-25243-18-git-send-email-t-kristo@ti.com> (raw)
In-Reply-To: <1512636413-25243-1-git-send-email-t-kristo-l0cyMroinI0@public.gmane.org>
Add clkctrl nodes for AM33xx SoC. These are going to be acting as
replacement for part of the existing clock data and the existing
clkctrl hooks under hwmod data.
This patch also removes any obsolete clock nodes, and reroutes all users
for these to use the new clkctrl clocks instead.
Signed-off-by: Tero Kristo <t-kristo-l0cyMroinI0@public.gmane.org>
---
arch/arm/boot/dts/am335x-bone-common.dtsi | 2 +-
arch/arm/boot/dts/am335x-boneblue.dts | 2 +-
arch/arm/boot/dts/am335x-evm.dts | 2 +-
arch/arm/boot/dts/am335x-evmsk.dts | 2 +-
arch/arm/boot/dts/am33xx-clocks.dtsi | 205 ++++++++++++++----------------
arch/arm/boot/dts/am33xx.dtsi | 2 +-
6 files changed, 97 insertions(+), 118 deletions(-)
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
index 48a15fc..63855ab 100644
--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
@@ -409,6 +409,6 @@
};
&rtc {
- clocks = <&clk_32768_ck>, <&clkdiv32k_ick>;
+ clocks = <&clk_32768_ck>, <&l4_per_clkctrl 0x138 0>;
clock-names = "ext-clk", "int-clk";
};
diff --git a/arch/arm/boot/dts/am335x-boneblue.dts b/arch/arm/boot/dts/am335x-boneblue.dts
index cdc1b2b..04f6c66a 100644
--- a/arch/arm/boot/dts/am335x-boneblue.dts
+++ b/arch/arm/boot/dts/am335x-boneblue.dts
@@ -446,7 +446,7 @@
&rtc {
system-power-controller;
- clocks = <&clk_32768_ck>, <&clkdiv32k_ick>;
+ clocks = <&clk_32768_ck>, <&l4_per_clkctrl 0x138 0>;
clock-names = "ext-clk", "int-clk";
};
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index ddd8975..c82e4b1 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -790,6 +790,6 @@
};
&rtc {
- clocks = <&clk_32768_ck>, <&clkdiv32k_ick>;
+ clocks = <&clk_32768_ck>, <&l4_per_clkctrl 0x138 0>;
clock-names = "ext-clk", "int-clk";
};
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts
index 9ba4b18..57207f5 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -722,6 +722,6 @@
};
&rtc {
- clocks = <&clk_32768_ck>, <&clkdiv32k_ick>;
+ clocks = <&clk_32768_ck>, <&l4_per_clkctrl 0x138 0>;
clock-names = "ext-clk", "int-clk";
};
diff --git a/arch/arm/boot/dts/am33xx-clocks.dtsi b/arch/arm/boot/dts/am33xx-clocks.dtsi
index 8d83195..9b244e9 100644
--- a/arch/arm/boot/dts/am33xx-clocks.dtsi
+++ b/arch/arm/boot/dts/am33xx-clocks.dtsi
@@ -292,14 +292,6 @@
clock-div = <4>;
};
- cefuse_fck: cefuse_fck@a20 {
- #clock-cells = <0>;
- compatible = "ti,gate-clock";
- clocks = <&sys_clkin_ck>;
- ti,bit-shift = <1>;
- reg = <0x0a20>;
- };
-
clk_24mhz: clk_24mhz {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
@@ -316,14 +308,6 @@
clock-div = <732>;
};
- clkdiv32k_ick: clkdiv32k_ick@14c {
- #clock-cells = <0>;
- compatible = "ti,gate-clock";
- clocks = <&clkdiv32k_ck>;
- ti,bit-shift = <1>;
- reg = <0x014c>;
- };
-
l3_gclk: l3_gclk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
@@ -350,49 +334,49 @@
timer1_fck: timer1_fck@528 {
#clock-cells = <0>;
compatible = "ti,mux-clock";
- clocks = <&sys_clkin_ck>, <&clkdiv32k_ick>, <&tclkin_ck>, <&clk_rc32k_ck>, <&clk_32768_ck>;
+ clocks = <&sys_clkin_ck>, <&l4_per_clkctrl 0x138 0>, <&tclkin_ck>, <&clk_rc32k_ck>, <&clk_32768_ck>;
reg = <0x0528>;
};
timer2_fck: timer2_fck@508 {
#clock-cells = <0>;
compatible = "ti,mux-clock";
- clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>;
+ clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&l4_per_clkctrl 0x138 0>;
reg = <0x0508>;
};
timer3_fck: timer3_fck@50c {
#clock-cells = <0>;
compatible = "ti,mux-clock";
- clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>;
+ clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&l4_per_clkctrl 0x138 0>;
reg = <0x050c>;
};
timer4_fck: timer4_fck@510 {
#clock-cells = <0>;
compatible = "ti,mux-clock";
- clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>;
+ clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&l4_per_clkctrl 0x138 0>;
reg = <0x0510>;
};
timer5_fck: timer5_fck@518 {
#clock-cells = <0>;
compatible = "ti,mux-clock";
- clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>;
+ clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&l4_per_clkctrl 0x138 0>;
reg = <0x0518>;
};
timer6_fck: timer6_fck@51c {
#clock-cells = <0>;
compatible = "ti,mux-clock";
- clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>;
+ clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&l4_per_clkctrl 0x138 0>;
reg = <0x051c>;
};
timer7_fck: timer7_fck@504 {
#clock-cells = <0>;
compatible = "ti,mux-clock";
- clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>;
+ clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&l4_per_clkctrl 0x138 0>;
reg = <0x0504>;
};
@@ -423,7 +407,7 @@
wdt1_fck: wdt1_fck@538 {
#clock-cells = <0>;
compatible = "ti,mux-clock";
- clocks = <&clk_rc32k_ck>, <&clkdiv32k_ick>;
+ clocks = <&clk_rc32k_ck>, <&l4_per_clkctrl 0x138 0>;
reg = <0x0538>;
};
@@ -493,42 +477,10 @@
gpio0_dbclk_mux_ck: gpio0_dbclk_mux_ck@53c {
#clock-cells = <0>;
compatible = "ti,mux-clock";
- clocks = <&clk_rc32k_ck>, <&clk_32768_ck>, <&clkdiv32k_ick>;
+ clocks = <&clk_rc32k_ck>, <&clk_32768_ck>, <&l4_per_clkctrl 0x138 0>;
reg = <0x053c>;
};
- gpio0_dbclk: gpio0_dbclk@408 {
- #clock-cells = <0>;
- compatible = "ti,gate-clock";
- clocks = <&gpio0_dbclk_mux_ck>;
- ti,bit-shift = <18>;
- reg = <0x0408>;
- };
-
- gpio1_dbclk: gpio1_dbclk@ac {
- #clock-cells = <0>;
- compatible = "ti,gate-clock";
- clocks = <&clkdiv32k_ick>;
- ti,bit-shift = <18>;
- reg = <0x00ac>;
- };
-
- gpio2_dbclk: gpio2_dbclk@b0 {
- #clock-cells = <0>;
- compatible = "ti,gate-clock";
- clocks = <&clkdiv32k_ick>;
- ti,bit-shift = <18>;
- reg = <0x00b0>;
- };
-
- gpio3_dbclk: gpio3_dbclk@b4 {
- #clock-cells = <0>;
- compatible = "ti,gate-clock";
- clocks = <&clkdiv32k_ick>;
- ti,bit-shift = <18>;
- reg = <0x00b4>;
- };
-
lcd_gclk: lcd_gclk@534 {
#clock-cells = <0>;
compatible = "ti,mux-clock";
@@ -577,58 +529,6 @@
reg = <0x0700>;
};
- dbg_sysclk_ck: dbg_sysclk_ck@414 {
- #clock-cells = <0>;
- compatible = "ti,gate-clock";
- clocks = <&sys_clkin_ck>;
- ti,bit-shift = <19>;
- reg = <0x0414>;
- };
-
- dbg_clka_ck: dbg_clka_ck@414 {
- #clock-cells = <0>;
- compatible = "ti,gate-clock";
- clocks = <&dpll_core_m4_ck>;
- ti,bit-shift = <30>;
- reg = <0x0414>;
- };
-
- stm_pmd_clock_mux_ck: stm_pmd_clock_mux_ck@414 {
- #clock-cells = <0>;
- compatible = "ti,mux-clock";
- clocks = <&dbg_sysclk_ck>, <&dbg_clka_ck>;
- ti,bit-shift = <22>;
- reg = <0x0414>;
- };
-
- trace_pmd_clk_mux_ck: trace_pmd_clk_mux_ck@414 {
- #clock-cells = <0>;
- compatible = "ti,mux-clock";
- clocks = <&dbg_sysclk_ck>, <&dbg_clka_ck>;
- ti,bit-shift = <20>;
- reg = <0x0414>;
- };
-
- stm_clk_div_ck: stm_clk_div_ck@414 {
- #clock-cells = <0>;
- compatible = "ti,divider-clock";
- clocks = <&stm_pmd_clock_mux_ck>;
- ti,bit-shift = <27>;
- ti,max-div = <64>;
- reg = <0x0414>;
- ti,index-power-of-two;
- };
-
- trace_clk_div_ck: trace_clk_div_ck@414 {
- #clock-cells = <0>;
- compatible = "ti,divider-clock";
- clocks = <&trace_pmd_clk_mux_ck>;
- ti,bit-shift = <24>;
- ti,max-div = <64>;
- reg = <0x0414>;
- ti,index-power-of-two;
- };
-
clkout2_ck: clkout2_ck@700 {
#clock-cells = <0>;
compatible = "ti,gate-clock";
@@ -638,9 +538,88 @@
};
};
-&prcm_clockdomains {
- clk_24mhz_clkdm: clk_24mhz_clkdm {
- compatible = "ti,clockdomain";
- clocks = <&clkdiv32k_ick>;
+&prcm {
+ l4_per_cm: l4_per_cm@0 {
+ compatible = "ti,omap4-cm";
+ reg = <0x0 0x200>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x0 0x200>;
+
+ l4_per_clkctrl: clk@14 {
+ compatible = "ti,clkctrl";
+ reg = <0x14 0x13c>;
+ #clock-cells = <2>;
+ };
+ };
+
+ l4_wkup_cm: l4_wkup_cm@400 {
+ compatible = "ti,omap4-cm";
+ reg = <0x400 0x100>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x400 0x100>;
+
+ l4_wkup_clkctrl: clk@4 {
+ compatible = "ti,clkctrl";
+ reg = <0x4 0xd4>;
+ #clock-cells = <2>;
+ };
+ };
+
+ mpu_cm: mpu_cm@600 {
+ compatible = "ti,omap4-cm";
+ reg = <0x600 0x100>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x600 0x100>;
+
+ mpu_clkctrl: clk@4 {
+ compatible = "ti,clkctrl";
+ reg = <0x4 0x4>;
+ #clock-cells = <2>;
+ };
+ };
+
+ l4_rtc_cm: l4_rtc_cm@800 {
+ compatible = "ti,omap4-cm";
+ reg = <0x800 0x100>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x800 0x100>;
+
+ l4_rtc_clkctrl: clk@0 {
+ compatible = "ti,clkctrl";
+ reg = <0x0 0x4>;
+ #clock-cells = <2>;
+ };
+ };
+
+ gfx_l3_cm: gfx_l3_cm@900 {
+ compatible = "ti,omap4-cm";
+ reg = <0x900 0x100>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x900 0x100>;
+
+ gfx_l3_clkctrl: clk@4 {
+ compatible = "ti,clkctrl";
+ reg = <0x4 0x4>;
+ #clock-cells = <2>;
+ };
+ };
+
+ l4_cefuse_cm: l4_cefuse_cm@a00 {
+ compatible = "ti,omap4-cm";
+ reg = <0xa00 0x100>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0xa00 0x100>;
+
+ l4_cefuse_clkctrl: clk@20 {
+ compatible = "ti,clkctrl";
+ reg = <0x20 0x4>;
+ #clock-cells = <2>;
+ };
};
};
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index bd10ba7..cde64a9 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -578,7 +578,7 @@
interrupts = <75
76>;
ti,hwmods = "rtc";
- clocks = <&clkdiv32k_ick>;
+ clocks = <&l4_per_clkctrl 0x138 0>;
clock-names = "int-clk";
};
--
1.9.1
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next prev parent reply other threads:[~2017-12-07 8:46 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-07 8:46 [PATCH 00/20] ARM: dts: add omap clkctrl support Tero Kristo
[not found] ` <1512636413-25243-1-git-send-email-t-kristo-l0cyMroinI0@public.gmane.org>
2017-12-07 8:46 ` [PATCH 01/20] ARM: dts: omap5: add fck under timer1 Tero Kristo
2017-12-07 8:46 ` [PATCH 02/20] ARM: dts: omap4: " Tero Kristo
2017-12-07 8:46 ` [PATCH 03/20] ARM: dts: am33xx: add fck under timers1/2 Tero Kristo
2017-12-07 8:46 ` [PATCH 04/20] ARM: dts: am43xx: " Tero Kristo
2017-12-07 8:46 ` [PATCH 05/20] ARM: dts: dra7: add fck under timer1 Tero Kristo
2017-12-07 8:46 ` [PATCH 06/20] ARM: dts: dm814x: add fck under timers1/2 Tero Kristo
2017-12-07 8:46 ` [PATCH 07/20] ARM: dts: dm816x: " Tero Kristo
2017-12-07 8:46 ` [PATCH 08/20] ARM: dts: omap5: add bus functionality to base PRCM nodes Tero Kristo
2017-12-07 8:46 ` [PATCH 09/20] ARM: dts: omap4: " Tero Kristo
2017-12-07 8:46 ` [PATCH 10/20] ARM: dts: dra7: " Tero Kristo
2017-12-07 8:46 ` [PATCH 11/20] ARM: dts: am33xx: add bus functionality to base PRCM node Tero Kristo
2017-12-07 8:46 ` [PATCH 12/20] ARM: dts: am43xx: " Tero Kristo
2017-12-07 8:46 ` [PATCH 13/20] ARM: dts: dm816x: " Tero Kristo
2017-12-07 8:46 ` [PATCH 14/20] ARM: dts: omap4: add clkctrl nodes Tero Kristo
[not found] ` <1512636413-25243-15-git-send-email-t-kristo-l0cyMroinI0@public.gmane.org>
2017-12-07 21:14 ` Tony Lindgren
2017-12-07 8:46 ` [PATCH 15/20] ARM: dts: omap5: " Tero Kristo
2017-12-07 8:46 ` [PATCH 16/20] ARM: dts: dra7: " Tero Kristo
2017-12-07 8:46 ` Tero Kristo [this message]
2017-12-07 8:46 ` [PATCH 18/20] ARM: dts: am43xx: " Tero Kristo
2017-12-07 8:46 ` [PATCH 19/20] ARM: dts: dm814x: " Tero Kristo
2017-12-07 8:46 ` [PATCH 20/20] ARM: dts: dm816x: " Tero Kristo
2017-12-07 21:16 ` [PATCH 00/20] ARM: dts: add omap clkctrl support Tony Lindgren
[not found] ` <20171207211620.GD28152-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
2017-12-08 6:58 ` Tero Kristo
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