From: Stefan Wahren <stefan.wahren-eS4NqCHxEME@public.gmane.org>
To: Thomas Gleixner <tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>,
Jason Cooper <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org>,
Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>,
Eric Anholt <eric-WhKQ6XTQaPysTnJN9+BGXg@public.gmane.org>,
Florian Fainelli
<f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Scott Branden <sbranden-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>
Cc: Russell King <linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org>,
phil-FnsA7b+Nu9XbIbC87yuRow@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-rpi-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
Stefan Wahren <stefan.wahren-eS4NqCHxEME@public.gmane.org>
Subject: [PATCH 3/3] ARM: dts: bcm283x: Define polarity of per-cpu interrupts
Date: Mon, 11 Dec 2017 21:39:12 +0100 [thread overview]
Message-ID: <1513024752-11246-4-git-send-email-stefan.wahren@i2se.com> (raw)
In-Reply-To: <1513024752-11246-1-git-send-email-stefan.wahren-eS4NqCHxEME@public.gmane.org>
This patch define the polarity of the per-cpu interrupts on BCM2836
and BCM2837 in order to avoid the warnings from ARM arch timer code:
arch_timer: WARNING: Invalid trigger for IRQ19, assuming level low
arch_timer: WARNING: Please fix your firmware
arch_timer: cp15 timer(s) running at 19.20MHz (virt).
Signed-off-by: Stefan Wahren <stefan.wahren-eS4NqCHxEME@public.gmane.org>
---
arch/arm/boot/dts/bcm2836.dtsi | 14 +++++++-------
arch/arm/boot/dts/bcm2837.dtsi | 12 ++++++------
arch/arm/boot/dts/bcm283x.dtsi | 1 +
3 files changed, 14 insertions(+), 13 deletions(-)
diff --git a/arch/arm/boot/dts/bcm2836.dtsi b/arch/arm/boot/dts/bcm2836.dtsi
index 61e1580..1dfd764 100644
--- a/arch/arm/boot/dts/bcm2836.dtsi
+++ b/arch/arm/boot/dts/bcm2836.dtsi
@@ -13,24 +13,24 @@
compatible = "brcm,bcm2836-l1-intc";
reg = <0x40000000 0x100>;
interrupt-controller;
- #interrupt-cells = <1>;
+ #interrupt-cells = <2>;
interrupt-parent = <&local_intc>;
};
arm-pmu {
compatible = "arm,cortex-a7-pmu";
interrupt-parent = <&local_intc>;
- interrupts = <9>;
+ interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
};
};
timer {
compatible = "arm,armv7-timer";
interrupt-parent = <&local_intc>;
- interrupts = <0>, // PHYS_SECURE_PPI
- <1>, // PHYS_NONSECURE_PPI
- <3>, // VIRT_PPI
- <2>; // HYP_PPI
+ interrupts = <0 IRQ_TYPE_LEVEL_HIGH>, // PHYS_SECURE_PPI
+ <1 IRQ_TYPE_LEVEL_HIGH>, // PHYS_NONSECURE_PPI
+ <3 IRQ_TYPE_LEVEL_HIGH>, // VIRT_PPI
+ <2 IRQ_TYPE_LEVEL_HIGH>; // HYP_PPI
always-on;
};
@@ -76,7 +76,7 @@
compatible = "brcm,bcm2836-armctrl-ic";
reg = <0x7e00b200 0x200>;
interrupt-parent = <&local_intc>;
- interrupts = <8>;
+ interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
};
&cpu_thermal {
diff --git a/arch/arm/boot/dts/bcm2837.dtsi b/arch/arm/boot/dts/bcm2837.dtsi
index bc1cca5..efa7d33 100644
--- a/arch/arm/boot/dts/bcm2837.dtsi
+++ b/arch/arm/boot/dts/bcm2837.dtsi
@@ -12,7 +12,7 @@
compatible = "brcm,bcm2836-l1-intc";
reg = <0x40000000 0x100>;
interrupt-controller;
- #interrupt-cells = <1>;
+ #interrupt-cells = <2>;
interrupt-parent = <&local_intc>;
};
};
@@ -20,10 +20,10 @@
timer {
compatible = "arm,armv7-timer";
interrupt-parent = <&local_intc>;
- interrupts = <0>, // PHYS_SECURE_PPI
- <1>, // PHYS_NONSECURE_PPI
- <3>, // VIRT_PPI
- <2>; // HYP_PPI
+ interrupts = <0 IRQ_TYPE_LEVEL_HIGH>, // PHYS_SECURE_PPI
+ <1 IRQ_TYPE_LEVEL_HIGH>, // PHYS_NONSECURE_PPI
+ <3 IRQ_TYPE_LEVEL_HIGH>, // VIRT_PPI
+ <2 IRQ_TYPE_LEVEL_HIGH>; // HYP_PPI
always-on;
};
@@ -73,7 +73,7 @@
compatible = "brcm,bcm2836-armctrl-ic";
reg = <0x7e00b200 0x200>;
interrupt-parent = <&local_intc>;
- interrupts = <8>;
+ interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
};
&cpu_thermal {
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index e08203c..0d43bd4 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -2,6 +2,7 @@
#include <dt-bindings/clock/bcm2835.h>
#include <dt-bindings/clock/bcm2835-aux.h>
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
/* firmware-provided startup stubs live here, where the secondary CPUs are
* spinning.
--
2.7.4
--
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next prev parent reply other threads:[~2017-12-11 20:39 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-11 20:39 [PATCH 0/3] irqchip: irq-bcm2836: add support for DT interrupt polarity Stefan Wahren
[not found] ` <1513024752-11246-1-git-send-email-stefan.wahren-eS4NqCHxEME@public.gmane.org>
2017-12-11 20:39 ` [PATCH 1/3] dt-bindings: bcm2836-l1-intc: add interrupt polarity support Stefan Wahren
[not found] ` <1513024752-11246-2-git-send-email-stefan.wahren-eS4NqCHxEME@public.gmane.org>
2017-12-15 21:53 ` Eric Anholt
2017-12-15 22:23 ` Rob Herring
2017-12-11 20:39 ` [PATCH 2/3] irqchip: irq-bcm2836: add support for DT interrupt polarity Stefan Wahren
2017-12-11 20:39 ` Stefan Wahren [this message]
2017-12-19 7:02 ` [PATCH 0/3] " Stefan Wahren
[not found] ` <d0c81267-8379-d4a1-ec56-fec3492c1df6-eS4NqCHxEME@public.gmane.org>
2017-12-19 16:36 ` Marc Zyngier
[not found] ` <a7939fae-31d1-c743-5957-d88be98a0c63-5wv7dgnIgG8@public.gmane.org>
2017-12-19 18:41 ` Eric Anholt
[not found] ` <8737461ry0.fsf-WhKQ6XTQaPysTnJN9+BGXg@public.gmane.org>
2017-12-19 18:50 ` Marc Zyngier
[not found] ` <97a68b71-2e62-13ba-72ac-575c3b68617a-5wv7dgnIgG8@public.gmane.org>
2017-12-20 0:12 ` Eric Anholt
2018-01-03 17:10 ` Stefan Wahren
[not found] ` <60587e4d-d285-34e7-3d27-ea1daa1f97d1-eS4NqCHxEME@public.gmane.org>
2018-01-03 17:14 ` Marc Zyngier
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