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From: Sricharan R <sricharan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
To: robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
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Cc: sricharan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org
Subject: [PATCH v5 05/15] devicetree: bindings: Document qcom,hfpll
Date: Tue, 19 Dec 2017 21:24:50 +0530	[thread overview]
Message-ID: <1513698900-10638-6-git-send-email-sricharan@codeaurora.org> (raw)
In-Reply-To: <1513698900-10638-1-git-send-email-sricharan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>

From: Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>

Adds bindings document for qcom,hfpll instantiated within
the Krait processor subsystem as separate register region.

Signed-off-by: Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
---
 .../devicetree/bindings/clock/qcom,hfpll.txt       | 46 ++++++++++++++++++++++
 1 file changed, 46 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,hfpll.txt

diff --git a/Documentation/devicetree/bindings/clock/qcom,hfpll.txt b/Documentation/devicetree/bindings/clock/qcom,hfpll.txt
new file mode 100644
index 0000000..771cb0a
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,hfpll.txt
@@ -0,0 +1,46 @@
+High-Frequency PLL (HFPLL)
+
+PROPERTIES
+
+- compatible:
+	Usage: required
+	Value type: <string>:
+		shall contain only one of the following. The generic
+		compatible "qcom,hfpll" should be also included.
+
+                        "qcom,hfpll-ipq8064", "qcom,hfpll"
+                        "qcom,hfpll-apq8064", "qcom,hfpll"
+                        "qcom,hfpll-msm8974", "qcom,hfpll"
+                        "qcom,hfpll-msm8960", "qcom,hfpll"
+
+- reg:
+	Usage: required
+	Value type: <prop-encoded-array>
+	Definition: address and size of HPLL registers. An optional second
+		    element specifies the address and size of the alias
+		    register region.
+
+- clock-output-names:
+	Usage: required
+	Value type: <string>
+	Definition: Name of the PLL. Typically hfpllX where X is a CPU number
+		    starting at 0. Otherwise hfpll_Y where Y is more specific
+		    such as "l2".
+
+Example:
+
+1) An HFPLL for the L2 cache.
+
+	clock-controller@f9016000 {
+		compatible = "qcom,hfpll-ipq8064", "qcom,hfpll";
+		reg = <0xf9016000 0x30>;
+		clock-output-names = "hfpll_l2";
+	};
+
+2) An HFPLL for CPU0. This HFPLL has the alias register region.
+
+	clock-controller@f908a000 {
+		compatible = "qcom,hfpll-ipq8064", "qcom,hfpll";
+		reg = <0xf908a000 0x30>, <0xf900a000 0x30>;
+		clock-output-names = "hfpll0";
+	};
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

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  parent reply	other threads:[~2017-12-19 15:54 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-12-19 15:54 [PATCH v5 00/15] Krait clocks + Krait CPUfreq Sricharan R
2017-12-19 15:54 ` [PATCH v5 01/15] ARM: Add Krait L2 register accessor functions Sricharan R
2017-12-19 15:54 ` [PATCH v5 03/15] clk: qcom: Add support for High-Frequency PLLs (HFPLLs) Sricharan R
2017-12-19 15:54 ` [PATCH v5 04/15] clk: qcom: Add HFPLL driver Sricharan R
     [not found] ` <1513698900-10638-1-git-send-email-sricharan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-12-19 15:54   ` [PATCH v5 02/15] clk: mux: Split out register accessors for reuse Sricharan R
2017-12-19 15:54   ` Sricharan R [this message]
     [not found]     ` <1513698900-10638-6-git-send-email-sricharan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-12-20 21:11       ` [PATCH v5 05/15] devicetree: bindings: Document qcom,hfpll Rob Herring
2017-12-21  9:26         ` Sricharan R
2017-12-19 15:54   ` [PATCH v5 09/15] clk: qcom: Add KPSS ACC/GCC driver Sricharan R
2017-12-19 15:54   ` [PATCH v5 13/15] clk: qcom: Add safe switch hook for krait mux clocks Sricharan R
2017-12-19 15:54 ` [PATCH v5 06/15] clk: qcom: Add MSM8960/APQ8064's HFPLLs Sricharan R
2017-12-19 15:54 ` [PATCH v5 07/15] clk: qcom: Add IPQ806X's HFPLLs Sricharan R
2017-12-19 15:54 ` [PATCH v5 08/15] clk: qcom: Add support for Krait clocks Sricharan R
2017-12-19 15:54 ` [PATCH v5 10/15] devicetree: bindings: Document qcom,kpss-gcc Sricharan R
2017-12-20 21:13   ` Rob Herring
2017-12-21  9:27     ` Sricharan R
2017-12-19 15:54 ` [PATCH v5 11/15] clk: qcom: Add Krait clock controller driver Sricharan R
2017-12-19 15:54 ` [PATCH v5 12/15] devicetree: bindings: Document qcom,krait-cc Sricharan R
2017-12-20 21:14   ` Rob Herring
2017-12-21  9:28     ` Sricharan R
2017-12-19 15:54 ` [PATCH v5 14/15] cpufreq: Add module to register cpufreq on Krait CPUs Sricharan R
     [not found]   ` <1513698900-10638-15-git-send-email-sricharan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-12-20  3:36     ` Viresh Kumar
2017-12-20  6:19       ` Sricharan R
2017-12-19 15:55 ` [PATCH v5 15/15] devicetree: bindings: Document qcom,pvs Sricharan R
2017-12-20  3:26   ` Viresh Kumar
2017-12-20  6:25     ` Sricharan R
     [not found]       ` <b0d8147a-46e1-0787-ae37-9c1ef957d190-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-12-20  6:27         ` Viresh Kumar
2017-12-20  6:41           ` Sricharan R
2017-12-20 21:18         ` Rob Herring
2017-12-21 11:53           ` Sricharan R
2017-12-26 17:36             ` Rob Herring
2017-12-27 10:20               ` Sricharan R
2017-12-27 21:58                 ` Rob Herring

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