Re: [PATCH 4/6] ARM64: dts: meson-axg: uart: Add the pinctrl info description

[Jerome Brunet <jbrunet-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>]

On Fri, 2018-01-05 at 17:56 +0800, Yixun Lan wrote:
> Describe the pinctrl info for the UART controller which 

is

> found
> in the Meson-AXG SoCs.

Yixun,

Could you please review this patch again. Some "strings" used here will
obviously not work. I've picked up a few but I'm pretty sure there are other ...

Thanks

> 
> Signed-off-by: Yixun Lan <yixun.lan-LpR1jeaWuhtBDgjK7y7TUQ@public.gmane.org>
> ---
>  arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 96 ++++++++++++++++++++++++++++++
>  1 file changed, 96 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> index f6bf01cfff4b..78bb206e2897 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> @@ -303,6 +303,70 @@
>  						function = "pwm_d";
>  					};
>  				};
> +
> +				uart_a_pins: uart_a {
> +					mux {
> +						groups = "uart_tx_a",
> +							"uart_rx_a";
> +						function = "uart_a";
> +					};
> +				};
> +
> +				uart_a_cts_rts_pins: uart_a_cts_rts {
> +					mux {
> +						groups = "uart_ctx_a",

uart_ctx_a does not exist in pinctrl

> +							"uart_rts_a";
> +						function = "uart_a";
> +					};
> +				};
> +
> +				uart_b_x_pins: uart_b_x {
> +					mux {
> +						groups = "uart_tx_b_x",
> +							"uart_rx_b_x";
> +						function = "uart_b";
> +					};
> +				};
> +
> +				uart_b_x_cts_rts_pins: uart_b_x_cts_rts {
> +					mux {
> +						groups = "uart_cts_b_x",
> +							"uart_rts_b_x";
> +						function = "uart_b";
> +					};
> +				};
> +
> +				uart_b_z_pins: uart_b_z {
> +					mux {
> +						groups = "uart_tx_b_z",
> +							"uart_rx_b_z";
> +						function = "uart_b";
> +					};
> +				};
> +
> +				uart_b_z_cts_rts_pins: uart_b_z_cts_rts {
> +					mux {
> +						groups = "uart_cts_b_z",
> +							"uart_rts_b_z";
> +						function = "uart_b";
> +					};
> +				};
> +
> +				uart_ao_b_z_pins: uart_ao_b_z {
> +					mux {
> +						groups = "uart_ao_tx_b_z",
> +							"uart_ao_rx_b_z";
> +						function = "uart_ao_b_groupz";

"uart_ao_b_groupz" function does not exist in pinctrl

> +					};
> +				};
> +
> +				uart_ao_b_z_cts_rts_pins: uart_ao_b_z_cts_rts {
> +					mux {
> +						groups = "uart_ao_cts_b_z",
> +							"uart_ao_rts_b_z";
> +						function = "uart_ao_b_groupz";
> +					};
> +				};
>  			};
>  		};
>  
> @@ -346,6 +410,38 @@
>  					#gpio-cells = <2>;
>  					gpio-ranges = <&pinctrl_aobus 0 0 15>;
>  				};
> +
> +				uart_ao_a_pins: uart_ao_a {
> +					mux {
> +						groups = "uart_ao_tx_a",
> +							"uart_ao_rx_a";
> +						function = "uart_ao_a";
> +					};
> +				};
> +
> +				uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts {
> +					mux {
> +						groups = "uart_ao_cts_a",
> +							"uart_ao_rts_a";
> +						function = "uart_ao_a";
> +					};
> +				};
> +
> +				uart_ao_b_pins: uart_ao_b {
> +					mux {
> +						groups = "uart_ao_tx_b",
> +							"uart_ao_rx_b";
> +						function = "uart_ao_b";
> +					};
> +				};
> +
> +				uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts {
> +					mux {
> +						groups = "uart_ao_cts_b",
> +							"uart_ao_rts_b";
> +						function = "uart_ao_b";
> +					};
> +				};
>  			};
>  
>  			pwm_AO_ab: pwm@7000 {

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