From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jerome Brunet Subject: Re: [PATCH 4/6] ARM64: dts: meson-axg: uart: Add the pinctrl info description Date: Fri, 05 Jan 2018 11:28:43 +0100 Message-ID: <1515148123.5048.22.camel@baylibre.com> References: <20180105095621.196472-1-yixun.lan@amlogic.com> <20180105095621.196472-5-yixun.lan@amlogic.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20180105095621.196472-5-yixun.lan-LpR1jeaWuhtBDgjK7y7TUQ@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Yixun Lan , Kevin Hilman , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Cc: Neil Armstrong , Rob Herring , Mark Rutland , Carlo Caione , linux-amlogic-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org On Fri, 2018-01-05 at 17:56 +0800, Yixun Lan wrote: > Describe the pinctrl info for the UART controller which is > found > in the Meson-AXG SoCs. Yixun, Could you please review this patch again. Some "strings" used here will obviously not work. I've picked up a few but I'm pretty sure there are other ... Thanks > > Signed-off-by: Yixun Lan > --- > arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 96 ++++++++++++++++++++++++++++++ > 1 file changed, 96 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > index f6bf01cfff4b..78bb206e2897 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > @@ -303,6 +303,70 @@ > function = "pwm_d"; > }; > }; > + > + uart_a_pins: uart_a { > + mux { > + groups = "uart_tx_a", > + "uart_rx_a"; > + function = "uart_a"; > + }; > + }; > + > + uart_a_cts_rts_pins: uart_a_cts_rts { > + mux { > + groups = "uart_ctx_a", uart_ctx_a does not exist in pinctrl > + "uart_rts_a"; > + function = "uart_a"; > + }; > + }; > + > + uart_b_x_pins: uart_b_x { > + mux { > + groups = "uart_tx_b_x", > + "uart_rx_b_x"; > + function = "uart_b"; > + }; > + }; > + > + uart_b_x_cts_rts_pins: uart_b_x_cts_rts { > + mux { > + groups = "uart_cts_b_x", > + "uart_rts_b_x"; > + function = "uart_b"; > + }; > + }; > + > + uart_b_z_pins: uart_b_z { > + mux { > + groups = "uart_tx_b_z", > + "uart_rx_b_z"; > + function = "uart_b"; > + }; > + }; > + > + uart_b_z_cts_rts_pins: uart_b_z_cts_rts { > + mux { > + groups = "uart_cts_b_z", > + "uart_rts_b_z"; > + function = "uart_b"; > + }; > + }; > + > + uart_ao_b_z_pins: uart_ao_b_z { > + mux { > + groups = "uart_ao_tx_b_z", > + "uart_ao_rx_b_z"; > + function = "uart_ao_b_groupz"; "uart_ao_b_groupz" function does not exist in pinctrl > + }; > + }; > + > + uart_ao_b_z_cts_rts_pins: uart_ao_b_z_cts_rts { > + mux { > + groups = "uart_ao_cts_b_z", > + "uart_ao_rts_b_z"; > + function = "uart_ao_b_groupz"; > + }; > + }; > }; > }; > > @@ -346,6 +410,38 @@ > #gpio-cells = <2>; > gpio-ranges = <&pinctrl_aobus 0 0 15>; > }; > + > + uart_ao_a_pins: uart_ao_a { > + mux { > + groups = "uart_ao_tx_a", > + "uart_ao_rx_a"; > + function = "uart_ao_a"; > + }; > + }; > + > + uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts { > + mux { > + groups = "uart_ao_cts_a", > + "uart_ao_rts_a"; > + function = "uart_ao_a"; > + }; > + }; > + > + uart_ao_b_pins: uart_ao_b { > + mux { > + groups = "uart_ao_tx_b", > + "uart_ao_rx_b"; > + function = "uart_ao_b"; > + }; > + }; > + > + uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts { > + mux { > + groups = "uart_ao_cts_b", > + "uart_ao_rts_b"; > + function = "uart_ao_b"; > + }; > + }; > }; > > pwm_AO_ab: pwm@7000 { -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html