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From: Jerome Brunet <jbrunet@baylibre.com>
To: Yixun Lan <yixun.lan@amlogic.com>,
	Kevin Hilman <khilman@baylibre.com>,
	devicetree@vger.kernel.org
Cc: Neil Armstrong <narmstrong@baylibre.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Carlo Caione <carlo@caione.org>,
	linux-amlogic@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 3/6] ARM64: dts: meson-axg: uart: Add the clock info description
Date: Fri, 05 Jan 2018 11:29:23 +0100	[thread overview]
Message-ID: <1515148163.5048.23.camel@baylibre.com> (raw)
In-Reply-To: <20180105095621.196472-4-yixun.lan@amlogic.com>

On Fri, 2018-01-05 at 17:56 +0800, Yixun Lan wrote:
> Add the clock info description for the EE UART controller.
> 
> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
> ---
>  arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> index 9636a7c5f6ed..f6bf01cfff4b 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> @@ -146,6 +146,8 @@
>  				reg = <0x0 0x24000 0x0 0x18>;
>  				interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
>  				status = "disabled";
> +				clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
> +				clock-names = "xtal", "pclk", "baud";

This should squashed with change #1, where you remove amlogic,meson-uartcompatible. 

Otherwise uart is going to be broken between these patches.

>  			};
>  
>  			uart_B: serial@23000 {
> @@ -153,6 +155,8 @@
>  				reg = <0x0 0x23000 0x0 0x18>;
>  				interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
>  				status = "disabled";
> +				clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
> +				clock-names = "xtal", "pclk", "baud";
>  			};
>  		};
>  

  reply	other threads:[~2018-01-05 10:29 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-05  9:56 [PATCH 0/6] ARM64: dts: meson-axg: UART DT updates Yixun Lan
2018-01-05  9:56 ` [PATCH 1/6] ARM64: dts: meson-axg: uart: drop legacy compatible name from EE UART Yixun Lan
     [not found]   ` <20180105095621.196472-2-yixun.lan-LpR1jeaWuhtBDgjK7y7TUQ@public.gmane.org>
2018-01-05 10:30     ` Jerome Brunet
2018-01-05 13:11       ` Yixun Lan
2018-01-05  9:56 ` [PATCH 2/6] ARM64: dts: meson-axg: uart: fix address space range Yixun Lan
2018-01-05 10:30   ` Jerome Brunet
     [not found]     ` <1515148207.5048.24.camel-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
2018-01-05 13:43       ` Yixun Lan
2018-01-05  9:56 ` [PATCH 3/6] ARM64: dts: meson-axg: uart: Add the clock info description Yixun Lan
2018-01-05 10:29   ` Jerome Brunet [this message]
2018-01-05  9:56 ` [PATCH 4/6] ARM64: dts: meson-axg: uart: Add the pinctrl " Yixun Lan
     [not found]   ` <20180105095621.196472-5-yixun.lan-LpR1jeaWuhtBDgjK7y7TUQ@public.gmane.org>
2018-01-05 10:28     ` Jerome Brunet
2018-01-05 14:22       ` Yixun Lan
2018-01-05  9:56 ` [PATCH 5/6] arm64: dts: meson-axg: complete the pinctrl info for UART_AO_A Yixun Lan
     [not found]   ` <20180105095621.196472-6-yixun.lan-LpR1jeaWuhtBDgjK7y7TUQ@public.gmane.org>
2018-01-05 10:27     ` Jerome Brunet
2018-01-05  9:56 ` [PATCH 6/6] ARM64: dts: meson-axg: enable the UART_A controller Yixun Lan
     [not found]   ` <20180105095621.196472-7-yixun.lan-LpR1jeaWuhtBDgjK7y7TUQ@public.gmane.org>
2018-01-05 10:27     ` Jerome Brunet

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