* [PATCH 1/2 v2] ARM: dts: Add Aspeed SoC USB controllers to device-tree
@ 2018-01-12 6:21 Benjamin Herrenschmidt
[not found] ` <1515738064.31850.100.camel-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org>
0 siblings, 1 reply; 5+ messages in thread
From: Benjamin Herrenschmidt @ 2018-01-12 6:21 UTC (permalink / raw)
To: devicetree-u79uwXL29TY76Z2rM5mHXA
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Joel Stanley
This adds the USB controllers to the DT template of the
AST24xx and AST25xx SoCs.
This patch doesn't enable them by default on any board specific
.dts yet. This will be done when we have the necessary clock/reset
and pinmux support. In the meantime though, this will work if
u-boot configures things properly.
For the AST2400 I only added pinmux definition for port 1
which is dual USB1/USB2. There are additional USB1 only ports
that might require more work but I don't have HW to test at
hand so I'm leaving that to whoever cares.
Signed-off-by: Benjamin Herrenschmidt <benh-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org>
---
v2: Previous patch was missing actually adding the nodes
(which was an old patch in my tree I had forgotten to
merge).
arch/arm/boot/dts/aspeed-g4.dtsi | 27 +++++++++++++++++++++++++++
arch/arm/boot/dts/aspeed-g5.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++
2 files changed, 67 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index b0d8431a3700..e55f2ad5de59 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -103,6 +103,23 @@
status = "disabled";
};
+ ehci0: usb@1e6a1000 {
+ compatible = "aspeed,ast2400-ehci", "generic-ehci";
+ reg = <0x1e6a1000 0x100>;
+ interrupts = <5>;
+ clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
+ status = "disabled";
+ };
+
+ uhci: usb@1e6b0000 {
+ compatible = "aspeed,ast2400-uhci", "generic-uhci";
+ reg = <0x1e6b0000 0x100>;
+ interrupts = <14>;
+ #ports = <3>;
+ clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
+ status = "disabled";
+ };
+
apb {
compatible = "simple-bus";
#address-cells = <1>;
@@ -1227,6 +1244,16 @@
groups = "USBCKI";
};
+ pinctrl_usb2h_default: usb2h_default {
+ function = "USB2H1";
+ groups = "USB2H1";
+ };
+
+ pinctrl_usb2d_default: usb2d_default {
+ function = "USB2D1";
+ groups = "USB2D1";
+ };
+
pinctrl_vgabios_rom_default: vgabios_rom_default {
function = "VGABIOS_ROM";
groups = "VGABIOS_ROM";
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 40de3b66c33f..655258edee24 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -138,6 +138,31 @@
status = "disabled";
};
+ ehci0: usb@1e6a1000 {
+ compatible = "aspeed,ast2500-ehci", "generic-ehci";
+ reg = <0x1e6a1000 0x100>;
+ interrupts = <5>;
+ clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
+ status = "disabled";
+ };
+
+ ehci1: usb@1e6a3000 {
+ compatible = "aspeed,ast2500-ehci", "generic-ehci";
+ reg = <0x1e6a3000 0x100>;
+ interrupts = <13>;
+ clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
+ status = "disabled";
+ };
+
+ uhci: usb@1e6b0000 {
+ compatible = "aspeed,ast2500-uhci", "generic-uhci";
+ reg = <0x1e6b0000 0x100>;
+ interrupts = <14>;
+ #ports = <2>;
+ clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
+ status = "disabled";
+ };
+
apb {
compatible = "simple-bus";
#address-cells = <1>;
@@ -1358,6 +1383,21 @@
groups = "USBCKI";
};
+ pinctrl_usb2ah_default: usb2ah_default {
+ function = "USB2AH";
+ groups = "USB2AH";
+ };
+
+ pinctrl_usb11bhid_default: usb11bhid_default {
+ function = "USB11BHID";
+ groups = "USB11BHID";
+ };
+
+ pinctrl_usb2bh_default: usb2bh_default {
+ function = "USB2BH";
+ groups = "USB2BH";
+ };
+
pinctrl_vgabiosrom_default: vgabiosrom_default {
function = "VGABIOSROM";
groups = "VGABIOSROM";
--
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^ permalink raw reply related [flat|nested] 5+ messages in thread[parent not found: <1515738064.31850.100.camel-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org>]
* Re: [PATCH 1/2 v2] ARM: dts: Add Aspeed SoC USB controllers to device-tree [not found] ` <1515738064.31850.100.camel-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org> @ 2018-01-15 15:33 ` Joel Stanley 2018-01-15 15:59 ` Andrew Jeffery 1 sibling, 0 replies; 5+ messages in thread From: Joel Stanley @ 2018-01-15 15:33 UTC (permalink / raw) To: Benjamin Herrenschmidt Cc: devicetree, Joel Stanley, Linux ARM, linux-aspeed-uLR06cmDAlY/bJ5BZ2RsiQ, Andrew Jeffery On Thu, Jan 11, 2018 at 10:21 PM, Benjamin Herrenschmidt <benh-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org> wrote: > This adds the USB controllers to the DT template of the > AST24xx and AST25xx SoCs. > > This patch doesn't enable them by default on any board specific > .dts yet. This will be done when we have the necessary clock/reset > and pinmux support. In the meantime though, this will work if > u-boot configures things properly. > > For the AST2400 I only added pinmux definition for port 1 > which is dual USB1/USB2. There are additional USB1 only ports > that might require more work but I don't have HW to test at > hand so I'm leaving that to whoever cares. > > Signed-off-by: Benjamin Herrenschmidt <benh-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org> Andrew, can you check the pinmux stuff for us please? The other parts look good. Cheers, Joel > --- > > v2: Previous patch was missing actually adding the nodes > (which was an old patch in my tree I had forgotten to > merge). > > arch/arm/boot/dts/aspeed-g4.dtsi | 27 +++++++++++++++++++++++++++ > arch/arm/boot/dts/aspeed-g5.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++ > 2 files changed, 67 insertions(+) > > diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi > index b0d8431a3700..e55f2ad5de59 100644 > --- a/arch/arm/boot/dts/aspeed-g4.dtsi > +++ b/arch/arm/boot/dts/aspeed-g4.dtsi > @@ -103,6 +103,23 @@ > status = "disabled"; > }; > > + ehci0: usb@1e6a1000 { > + compatible = "aspeed,ast2400-ehci", "generic-ehci"; > + reg = <0x1e6a1000 0x100>; > + interrupts = <5>; > + clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; > + status = "disabled"; > + }; > + > + uhci: usb@1e6b0000 { > + compatible = "aspeed,ast2400-uhci", "generic-uhci"; > + reg = <0x1e6b0000 0x100>; > + interrupts = <14>; > + #ports = <3>; > + clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>; > + status = "disabled"; > + }; > + > apb { > compatible = "simple-bus"; > #address-cells = <1>; > @@ -1227,6 +1244,16 @@ > groups = "USBCKI"; > }; > > + pinctrl_usb2h_default: usb2h_default { > + function = "USB2H1"; > + groups = "USB2H1"; > + }; > + > + pinctrl_usb2d_default: usb2d_default { > + function = "USB2D1"; > + groups = "USB2D1"; > + }; > + > pinctrl_vgabios_rom_default: vgabios_rom_default { > function = "VGABIOS_ROM"; > groups = "VGABIOS_ROM"; > diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi > index 40de3b66c33f..655258edee24 100644 > --- a/arch/arm/boot/dts/aspeed-g5.dtsi > +++ b/arch/arm/boot/dts/aspeed-g5.dtsi > @@ -138,6 +138,31 @@ > status = "disabled"; > }; > > + ehci0: usb@1e6a1000 { > + compatible = "aspeed,ast2500-ehci", "generic-ehci"; > + reg = <0x1e6a1000 0x100>; > + interrupts = <5>; > + clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; > + status = "disabled"; > + }; > + > + ehci1: usb@1e6a3000 { > + compatible = "aspeed,ast2500-ehci", "generic-ehci"; > + reg = <0x1e6a3000 0x100>; > + interrupts = <13>; > + clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>; > + status = "disabled"; > + }; > + > + uhci: usb@1e6b0000 { > + compatible = "aspeed,ast2500-uhci", "generic-uhci"; > + reg = <0x1e6b0000 0x100>; > + interrupts = <14>; > + #ports = <2>; > + clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>; > + status = "disabled"; > + }; > + > apb { > compatible = "simple-bus"; > #address-cells = <1>; > @@ -1358,6 +1383,21 @@ > groups = "USBCKI"; > }; > > + pinctrl_usb2ah_default: usb2ah_default { > + function = "USB2AH"; > + groups = "USB2AH"; > + }; > + > + pinctrl_usb11bhid_default: usb11bhid_default { > + function = "USB11BHID"; > + groups = "USB11BHID"; > + }; > + > + pinctrl_usb2bh_default: usb2bh_default { > + function = "USB2BH"; > + groups = "USB2BH"; > + }; > + > pinctrl_vgabiosrom_default: vgabiosrom_default { > function = "VGABIOSROM"; > groups = "VGABIOSROM"; > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2 v2] ARM: dts: Add Aspeed SoC USB controllers to device-tree [not found] ` <1515738064.31850.100.camel-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org> 2018-01-15 15:33 ` Joel Stanley @ 2018-01-15 15:59 ` Andrew Jeffery 2018-01-15 21:56 ` Benjamin Herrenschmidt 2018-03-28 0:32 ` Joel Stanley 1 sibling, 2 replies; 5+ messages in thread From: Andrew Jeffery @ 2018-01-15 15:59 UTC (permalink / raw) To: Benjamin Herrenschmidt, devicetree-u79uwXL29TY76Z2rM5mHXA Cc: Joel Stanley, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r [-- Attachment #1: Type: text/plain, Size: 4513 bytes --] On Fri, 2018-01-12 at 17:21 +1100, Benjamin Herrenschmidt wrote: > This adds the USB controllers to the DT template of the > AST24xx and AST25xx SoCs. > > This patch doesn't enable them by default on any board specific > .dts yet. This will be done when we have the necessary clock/reset > and pinmux support. In the meantime though, this will work if > u-boot configures things properly. > > For the AST2400 I only added pinmux definition for port 1 > which is dual USB1/USB2. There are additional USB1 only ports > that might require more work but I don't have HW to test at > hand so I'm leaving that to whoever cares. > > Signed-off-by: Benjamin Herrenschmidt <benh-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org> > --- > > v2: Previous patch was missing actually adding the nodes > (which was an old patch in my tree I had forgotten to > merge). > > arch/arm/boot/dts/aspeed-g4.dtsi | 27 +++++++++++++++++++++++++++ > arch/arm/boot/dts/aspeed-g5.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++ > 2 files changed, 67 insertions(+) > > diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi > index b0d8431a3700..e55f2ad5de59 100644 > --- a/arch/arm/boot/dts/aspeed-g4.dtsi > +++ b/arch/arm/boot/dts/aspeed-g4.dtsi > @@ -103,6 +103,23 @@ > status = "disabled"; > }; > > + ehci0: usb@1e6a1000 { > + compatible = "aspeed,ast2400-ehci", "generic-ehci"; > + reg = <0x1e6a1000 0x100>; > + interrupts = <5>; > + clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; > + status = "disabled"; > + }; > + > + uhci: usb@1e6b0000 { > + compatible = "aspeed,ast2400-uhci", "generic-uhci"; > + reg = <0x1e6b0000 0x100>; > + interrupts = <14>; > + #ports = <3>; I tried to find the documentation for the #ports property, but it seems to not exist. Couldn't find any users either, but maybe I didn't look broadly enough. It is tested for in drivers/usb/host/uhci-platform.c though, so I guess it's functional. > + clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>; > + status = "disabled"; > + }; > + > apb { > compatible = "simple-bus"; > #address-cells = <1>; > @@ -1227,6 +1244,16 @@ > groups = "USBCKI"; > }; > > + pinctrl_usb2h_default: usb2h_default { > + function = "USB2H1"; > + groups = "USB2H1"; > + }; > + > + pinctrl_usb2d_default: usb2d_default { > + function = "USB2D1"; > + groups = "USB2D1"; > + }; > + > pinctrl_vgabios_rom_default: vgabios_rom_default { > function = "VGABIOS_ROM"; > groups = "VGABIOS_ROM"; > diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi > index 40de3b66c33f..655258edee24 100644 > --- a/arch/arm/boot/dts/aspeed-g5.dtsi > +++ b/arch/arm/boot/dts/aspeed-g5.dtsi > @@ -138,6 +138,31 @@ > status = "disabled"; > }; > > + ehci0: usb@1e6a1000 { > + compatible = "aspeed,ast2500-ehci", "generic-ehci"; > + reg = <0x1e6a1000 0x100>; > + interrupts = <5>; > + clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; > + status = "disabled"; > + }; > + > + ehci1: usb@1e6a3000 { > + compatible = "aspeed,ast2500-ehci", "generic-ehci"; > + reg = <0x1e6a3000 0x100>; > + interrupts = <13>; > + clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>; > + status = "disabled"; > + }; > + > + uhci: usb@1e6b0000 { > + compatible = "aspeed,ast2500-uhci", "generic-uhci"; > + reg = <0x1e6b0000 0x100>; > + interrupts = <14>; > + #ports = <2>; > + clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>; > + status = "disabled"; > + }; > + > apb { > compatible = "simple-bus"; > #address-cells = <1>; > @@ -1358,6 +1383,21 @@ > groups = "USBCKI"; > }; > > + pinctrl_usb2ah_default: usb2ah_default { > + function = "USB2AH"; > + groups = "USB2AH"; > + }; > + > + pinctrl_usb11bhid_default: usb11bhid_default { > + function = "USB11BHID"; > + groups = "USB11BHID"; > + }; > + > + pinctrl_usb2bh_default: usb2bh_default { > + function = "USB2BH"; > + groups = "USB2BH"; > + }; > + > pinctrl_vgabiosrom_default: vgabiosrom_default { > function = "VGABIOSROM"; > groups = "VGABIOSROM"; Reviewed-by: Andrew Jeffery <andrew-zrmu5oMJ5Fs@public.gmane.org> > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel [-- Attachment #2: This is a digitally signed message part --] [-- Type: application/pgp-signature, Size: 801 bytes --] ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2 v2] ARM: dts: Add Aspeed SoC USB controllers to device-tree 2018-01-15 15:59 ` Andrew Jeffery @ 2018-01-15 21:56 ` Benjamin Herrenschmidt 2018-03-28 0:32 ` Joel Stanley 1 sibling, 0 replies; 5+ messages in thread From: Benjamin Herrenschmidt @ 2018-01-15 21:56 UTC (permalink / raw) To: Andrew Jeffery, devicetree; +Cc: Joel Stanley, linux-arm-kernel On Mon, 2018-01-15 at 09:59 -0600, Andrew Jeffery wrote: > > + uhci: usb@1e6b0000 { > > + compatible = "aspeed,ast2400-uhci", "generic-uhci"; > > + reg = <0x1e6b0000 0x100>; > > + interrupts = <14>; > > + #ports = <3>; > > I tried to find the documentation for the #ports property, but it seems > to not exist. Couldn't find any users either, but maybe I didn't look > broadly enough. It is tested for in drivers/usb/host/uhci-platform.c > though, so I guess it's functional. I added it to uhci-platform back when that was merged but forgot to update the binding. I'll send a separate patch for that. Cheers, Ben. ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2 v2] ARM: dts: Add Aspeed SoC USB controllers to device-tree 2018-01-15 15:59 ` Andrew Jeffery 2018-01-15 21:56 ` Benjamin Herrenschmidt @ 2018-03-28 0:32 ` Joel Stanley 1 sibling, 0 replies; 5+ messages in thread From: Joel Stanley @ 2018-03-28 0:32 UTC (permalink / raw) To: Andrew Jeffery, Benjamin Herrenschmidt Cc: devicetree, Joel Stanley, linux-aspeed, Linux ARM On 16 January 2018 at 02:29, Andrew Jeffery <andrew@aj.id.au> wrote: > On Fri, 2018-01-12 at 17:21 +1100, Benjamin Herrenschmidt wrote: >> This adds the USB controllers to the DT template of the >> AST24xx and AST25xx SoCs. >> >> This patch doesn't enable them by default on any board specific >> .dts yet. This will be done when we have the necessary clock/reset >> and pinmux support. In the meantime though, this will work if >> u-boot configures things properly. >> >> For the AST2400 I only added pinmux definition for port 1 >> which is dual USB1/USB2. There are additional USB1 only ports >> that might require more work but I don't have HW to test at >> hand so I'm leaving that to whoever cares. >> >> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> >> --- >> >> v2: Previous patch was missing actually adding the nodes >> (which was an old patch in my tree I had forgotten to >> merge). >> >> arch/arm/boot/dts/aspeed-g4.dtsi | 27 +++++++++++++++++++++++++++ >> arch/arm/boot/dts/aspeed-g5.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++ >> 2 files changed, 67 insertions(+) > Reviewed-by: Andrew Jeffery <andrew@aj.id.au> This one also slipped through the cracks. I have applied it to the aspeed tree with Andrew's review. Cheers, Joel ^ permalink raw reply [flat|nested] 5+ messages in thread
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2018-01-12 6:21 [PATCH 1/2 v2] ARM: dts: Add Aspeed SoC USB controllers to device-tree Benjamin Herrenschmidt
[not found] ` <1515738064.31850.100.camel-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org>
2018-01-15 15:33 ` Joel Stanley
2018-01-15 15:59 ` Andrew Jeffery
2018-01-15 21:56 ` Benjamin Herrenschmidt
2018-03-28 0:32 ` Joel Stanley
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