From: Kieran Bingham <kbingham@kernel.org>
To: linux-renesas-soc@vger.kernel.org,
Simon Horman <horms@verge.net.au>,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Kieran Bingham <kieran.bingham@ideasonboard.com>
Cc: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>,
Magnus Damm <magnus.damm@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
"moderated list:ARM64 PORT AARCH64 ARCHITECTURE"
<linux-arm-kernel@lists.infradead.org>,
open list <linux-kernel@vger.kernel.org>
Subject: [PATCH v2 4/4] arm64: dts: renesas: r8a7796: Fix register mappings on VSPs
Date: Tue, 13 Feb 2018 19:30:37 +0000 [thread overview]
Message-ID: <1518550237-16753-5-git-send-email-kbingham@kernel.org> (raw)
In-Reply-To: <1518550237-16753-1-git-send-email-kbingham@kernel.org>
From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
The VSPD includes a CLUT on RPF2. Ensure that the register space is
mapped correctly to support this.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index 60755117cba5..3fe5566e0630 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -2285,7 +2285,7 @@
vspd0: vsp@fea20000 {
compatible = "renesas,vsp2";
- reg = <0 0xfea20000 0 0x4000>;
+ reg = <0 0xfea20000 0 0x8000>;
interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 623>;
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
@@ -2305,7 +2305,7 @@
vspd1: vsp@fea28000 {
compatible = "renesas,vsp2";
- reg = <0 0xfea28000 0 0x4000>;
+ reg = <0 0xfea28000 0 0x8000>;
interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 622>;
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
@@ -2325,7 +2325,7 @@
vspd2: vsp@fea30000 {
compatible = "renesas,vsp2";
- reg = <0 0xfea30000 0 0x4000>;
+ reg = <0 0xfea30000 0 0x8000>;
interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 621>;
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
--
2.7.4
next prev parent reply other threads:[~2018-02-13 19:30 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1518550237-16753-1-git-send-email-kbingham@kernel.org>
[not found] ` <1518550237-16753-1-git-send-email-kbingham-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
2018-02-13 19:30 ` [PATCH v2 1/4] arm64: dts: renesas: r8a77995: add FCPV nodes Kieran Bingham
2018-02-13 22:02 ` Laurent Pinchart
2018-02-13 19:30 ` [PATCH v2 2/4] arm64: dts: renesas: r8a77995: add VSP instances Kieran Bingham
2018-02-13 22:03 ` Laurent Pinchart
2018-02-14 8:39 ` Kieran Bingham
2018-02-13 19:30 ` [PATCH v2 3/4] arm64: dts: renesas: r8a7795: Fix register mappings on VSPs Kieran Bingham
[not found] ` <1518550237-16753-4-git-send-email-kbingham-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
2018-02-13 22:04 ` Laurent Pinchart
2018-02-13 19:30 ` Kieran Bingham [this message]
2018-02-13 22:04 ` [PATCH v2 4/4] arm64: dts: renesas: r8a7796: " Laurent Pinchart
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