From mboxrd@z Thu Jan 1 00:00:00 1970 From: Fabrice Gasnier Subject: [RESEND PATCH 2/3] pwm: stm32: LPTimer: use 3 cells xlate Date: Fri, 23 Feb 2018 14:36:04 +0100 Message-ID: <1519392965-28235-3-git-send-email-fabrice.gasnier@st.com> References: <1519392965-28235-1-git-send-email-fabrice.gasnier@st.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1519392965-28235-1-git-send-email-fabrice.gasnier@st.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: thierry.reding@gmail.com, alexandre.torgue@st.com Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, benjamin.gaignard@linaro.org, linux-pwm@vger.kernel.org, linux@armlinux.org.uk, linux-kernel@vger.kernel.org, robh+dt@kernel.org, mcoquelin.stm32@gmail.com, fabrice.gasnier@st.com, linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org From: Gerald Baeza STM32 Low-Power Timer supports generic 3 cells pwm to encode PWM number, period and polarity. Signed-off-by: Gerald Baeza Signed-off-by: Fabrice Gasnier --- drivers/pwm/pwm-stm32-lp.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c index 1ac9e43..346b7bd 100644 --- a/drivers/pwm/pwm-stm32-lp.c +++ b/drivers/pwm/pwm-stm32-lp.c @@ -203,6 +203,8 @@ static int stm32_pwm_lp_probe(struct platform_device *pdev) priv->chip.dev = &pdev->dev; priv->chip.ops = &stm32_pwm_lp_ops; priv->chip.npwm = 1; + priv->chip.of_xlate = of_pwm_xlate_with_flags; + priv->chip.of_pwm_n_cells = 3; ret = pwmchip_add(&priv->chip); if (ret < 0) -- 1.9.1