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From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: John Garry <john.garry@huawei.com>,
	mika.westerberg@linux.intel.com, rafael@kernel.org,
	lorenzo.pieralisi@arm.com, rjw@rjwysocki.net,
	hanjun.guo@linaro.org, robh+dt@kernel.org, bhelgaas@google.com,
	arnd@arndb.de, mark.rutland@arm.com, olof@lixom.net,
	dann.frazier@canonical.com, andy.shevchenko@gmail.com,
	robh@kernel.org
Cc: joe@perches.com, benh@kernel.crashing.org,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-acpi@vger.kernel.org, linuxarm@huawei.com, minyard@acm.org,
	devicetree@vger.kernel.org, linux-arch@vger.kernel.org,
	rdunlap@infradead.org, gregkh@linuxfoundation.org,
	akpm@linux-foundation.org, frowand.list@gmail.com, agraf@suse.de
Subject: Re: [PATCH v15 6/9] HISI LPC: Support the LPC host on Hip06/Hip07 with DT bindings
Date: Thu, 01 Mar 2018 21:26:48 +0200	[thread overview]
Message-ID: <1519932408.10722.351.camel@linux.intel.com> (raw)
In-Reply-To: <1519663249-9850-7-git-send-email-john.garry@huawei.com>

On Tue, 2018-02-27 at 00:40 +0800, John Garry wrote:

> The low-pin-count(LPC) interface of Hip06/Hip07 accesses the
> peripherals in
> I/O port addresses. This patch implements the LPC host controller
> driver
> which perform the I/O operations on the underlying hardware.
> We don't want to touch those existing peripherals' driver, such as
> ipmi-bt.
> So this driver applies the indirect-IO introduced in the previous
> patch
> after registering an indirect-IO node to the indirect-IO devices list
> which
> will be searched in the I/O accessors to retrieve the host-local I/O
> port.
> 
> The driver config is set as a bool instead of a trisate. The reason
> here is that, by the very nature of the driver providing a logical
> PIO range, it does not make sense to have this driver as a loadable
> module. Another more specific reason is that the Huawei D03 board
> which includes hip06 SoC requires the LPC bus for UART console, so
> should be built in.

Few minor comments below.

> +static inline int wait_lpc_idle(unsigned char *mbase,
> +				unsigned int waitcnt) {
> +	do {
> +		u32 status;
> +
> +		status = readl(mbase + LPC_REG_OP_STATUS);
> +		if (status & LPC_REG_OP_STATUS_IDLE)
> +			return (status & LPC_REG_OP_STATUS_FINISHED)
> ? 0 : -EIO;
> +		ndelay(LPC_NSEC_PERWAIT);

> +	} while (waitcnt--);

} while (--waitcnt);

> +
> +	return -ETIME;
> +}

> +
> +/*

If you would like to have a documentation you need to use proper syntax,
i.e.

/**

Check the rest of the series for it.

> + * hisi_lpc_target_in - trigger a series of LPC cycles for read
> operation
> + * @lpcdev: pointer to hisi lpc device
> + * @para: some parameters used to control the lpc I/O operations
> + * @addr: the lpc I/O target port address
> + * @buf: where the read back data is stored
> + * @opcnt: how many I/O operations required, i.e. data width
> + *
> + * Returns 0 on success, non-zero on fail.
> + */

> +	do {
> +		*buf++ = readb(lpcdev->membase + LPC_REG_RDATA);
> +	} while (--opcnt);

readsb() ?

> +	do {
> +		writeb(*buf++, lpcdev->membase + LPC_REG_WDATA);
> +	} while (--opcnt);

writesb() ?

> +static inline unsigned long
> +hisi_lpc_pio_to_addr(struct hisi_lpc_dev *lpcdev, unsigned long pio)
> +{
> +	return pio - lpcdev->io_host->io_start +
> +		lpcdev->io_host->hw_start;

I would rather put on one line.

> +}

> +	do {
> +		if (hisi_lpc_target_out(lpcdev, &iopara, addr, buf,
> +						dwidth))

Fancy indentation. Perhaps put to one line?

> +			break;
> +		buf += dwidth;
> +	} while (--count);


> +	int ret;
> +
> +	lpcdev = devm_kzalloc(dev, sizeof(struct hisi_lpc_dev),
> GFP_KERNEL);

sizeof(*lpcdev) ?

> +	if (!lpcdev)
> +		return -ENOMEM;

> +	dev_info(dev, "registered range[%pa - sz:%pa]\n",

This is rather non-standard. We provide for resources the pattern like
"... [start-end]\n"

> +		 &lpcdev->io_host->io_start,
> +		 &lpcdev->io_host->size);

-- 
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Finland Oy

  reply	other threads:[~2018-03-01 19:26 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-26 16:40 [PATCH v15 0/9] LPC: legacy ISA I/O support John Garry
2018-02-26 16:40 ` [PATCH v15 1/9] LIB: Introduce a generic PIO mapping method John Garry
2018-03-01 19:11   ` Andy Shevchenko
2018-03-02 10:33     ` John Garry
2018-02-26 16:40 ` [PATCH v15 2/9] PCI: Remove unused __weak attribute in pci_register_io_range() John Garry
2018-02-26 16:40 ` [PATCH v15 3/9] PCI: Add fwnode handler as input param of pci_register_io_range() John Garry
2018-02-26 16:40 ` [PATCH v15 4/9] PCI: Apply the new generic I/O management on PCI IO hosts John Garry
2018-02-26 16:40 ` [PATCH v15 5/9] OF: Add missing I/O range exception for indirect-IO devices John Garry
2018-02-26 16:40 ` [PATCH v15 6/9] HISI LPC: Support the LPC host on Hip06/Hip07 with DT bindings John Garry
2018-03-01 19:26   ` Andy Shevchenko [this message]
2018-03-02 10:44     ` John Garry
2018-02-26 16:40 ` [PATCH v15 7/9] ACPI / scan: do not enumerate Indirect IO host children John Garry
2018-02-26 16:40 ` [PATCH v15 8/9] HISI LPC: Add ACPI support John Garry
2018-03-01 19:50   ` Andy Shevchenko
2018-03-02 10:19     ` John Garry
2018-03-06 11:19       ` Andy Shevchenko
2018-02-26 16:40 ` [PATCH v15 9/9] MAINTAINERS: Add maintainer for HiSilicon LPC driver John Garry
2018-03-01 19:52 ` [PATCH v15 0/9] LPC: legacy ISA I/O support Andy Shevchenko
2018-03-02 10:48   ` John Garry

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