[PATCH 2/7] gpio: rcar: Add optional functional clock to bindings

[PATCH 2/7] gpio: rcar: Add optional functional clock to bindings

[Geert Uytterhoeven]

From: Geert Uytterhoeven <geert+renesas@glider.be>

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
Cc: linux-gpio@vger.kernel.org
Cc: devicetree@vger.kernel.org
---
 .../devicetree/bindings/gpio/renesas,gpio-rcar.txt |    4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
index f61cef74a212..9ccbe50dcec2 100644
--- a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
+++ b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
@@ -21,6 +21,10 @@ Required Properties:
     GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
   - gpio-ranges: Range of pins managed by the GPIO controller.
 
+Optional properties:
+
+  - clocks: Must contain a reference to the functional clock.
+
 Please refer to gpio.txt in this directory for details of gpio-ranges property
 and the common GPIO bindings used by client devices.
 
-- 
1.7.9.5

Re: [PATCH 2/7] gpio: rcar: Add optional functional clock to bindings

[Laurent Pinchart]

Hi Geert,

Thank you for the patch.

On Thursday 27 March 2014 21:47:37 Geert Uytterhoeven wrote:
> From: Geert Uytterhoeven <geert+renesas@glider.be>
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
> Cc: linux-gpio@vger.kernel.org
> Cc: devicetree@vger.kernel.org
> ---
>  .../devicetree/bindings/gpio/renesas,gpio-rcar.txt |    4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
> b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt index
> f61cef74a212..9ccbe50dcec2 100644
> --- a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
> +++ b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
> @@ -21,6 +21,10 @@ Required Properties:
>      GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
>    - gpio-ranges: Range of pins managed by the GPIO controller.
> 
> +Optional properties:
> +
> +  - clocks: Must contain a reference to the functional clock.
> +

I would make the property mandatory. Obviously the driver needs to consider it 
as optional in order not to break the DT ABI, but the specification should 
make it mandatory in order to ensure that all future implementations will 
specify the clock.

>  Please refer to gpio.txt in this directory for details of gpio-ranges
> property and the common GPIO bindings used by client devices.

-- 
Regards,

Laurent Pinchart

Re: [PATCH 2/7] gpio: rcar: Add optional functional clock to bindings

[Geert Uytterhoeven]

Hi Laurent,

On Fri, Mar 28, 2014 at 5:53 PM, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
>> --- a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
>> +++ b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
>> @@ -21,6 +21,10 @@ Required Properties:
>>      GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
>>    - gpio-ranges: Range of pins managed by the GPIO controller.
>>
>> +Optional properties:
>> +
>> +  - clocks: Must contain a reference to the functional clock.
>> +
>
> I would make the property mandatory. Obviously the driver needs to consider it
> as optional in order not to break the DT ABI, but the specification should
> make it mandatory in order to ensure that all future implementations will
> specify the clock.

I think it has to stay optional: unless I misinterpreted the datasheet, r8a7778
doesn't have MSTP bits for the GPIO modules. I guess it's the same for
other R-Car Gen1 like r8a7779. So it looks like the bits were added in
R-Car Gen2.

Hence I'll just add ", if present", unless the Best Practice is to put such
properties under "Required properties" or "Recommended properties"?

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 2/7] gpio: rcar: Add optional functional clock to bindings

[Laurent Pinchart]

Hi Geert,

On Monday 31 March 2014 11:55:52 Geert Uytterhoeven wrote:
> On Fri, Mar 28, 2014 at 5:53 PM, Laurent Pinchart wrote:
> >> --- a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
> >> +++ b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
> >> 
> >> @@ -21,6 +21,10 @@ Required Properties:
> >>      GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
> >>    - gpio-ranges: Range of pins managed by the GPIO controller.
> >> 
> >> +Optional properties:
> >> +
> >> +  - clocks: Must contain a reference to the functional clock.
> >> +
> > 
> > I would make the property mandatory. Obviously the driver needs to
> > consider it as optional in order not to break the DT ABI, but the
> > specification should make it mandatory in order to ensure that all future
> > implementations will specify the clock.
> 
> I think it has to stay optional: unless I misinterpreted the datasheet,
> r8a7778 doesn't have MSTP bits for the GPIO modules. I guess it's the same
> for other R-Car Gen1 like r8a7779. So it looks like the bits were added in
> R-Car Gen2.

Good point. It might also be that older SoCs have MSTP bits for the GPIO cores 
but don't document them. Anyway, we have no information, so we can't specify a 
clock.

> Hence I'll just add ", if present", unless the Best Practice is to put such
> properties under "Required properties" or "Recommended properties"?

I'm fine with keeping in under "Optional Properties". I would phrase it as 
"Must contain a reference to the functional clock. The property is mandatory 
if the hardware implements a controllable functional clock for the GPIO 
instance." (or something similar).

-- 
Regards,

Laurent Pinchart

[PATCH 4/7] ARM: shmobile: r8a7790 dtsi: Add GPIO clocks

[Geert Uytterhoeven]

From: Geert Uytterhoeven <geert+renesas@glider.be>

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: devicetree@vger.kernel.org
---
 arch/arm/boot/dts/r8a7790.dtsi |   13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index da69afc9e5cb..b0ddf58ac872 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -113,6 +113,7 @@
 		gpio-ranges = <&pfc 0 0 32>;
 		#interrupt-cells = <2>;
 		interrupt-controller;
+		clocks = <&mstp9_clks R8A7790_CLK_GPIO0>;
 	};
 
 	gpio1: gpio@e6051000 {
@@ -124,6 +125,7 @@
 		gpio-ranges = <&pfc 0 32 32>;
 		#interrupt-cells = <2>;
 		interrupt-controller;
+		clocks = <&mstp9_clks R8A7790_CLK_GPIO1>;
 	};
 
 	gpio2: gpio@e6052000 {
@@ -135,6 +137,7 @@
 		gpio-ranges = <&pfc 0 64 32>;
 		#interrupt-cells = <2>;
 		interrupt-controller;
+		clocks = <&mstp9_clks R8A7790_CLK_GPIO2>;
 	};
 
 	gpio3: gpio@e6053000 {
@@ -146,6 +149,7 @@
 		gpio-ranges = <&pfc 0 96 32>;
 		#interrupt-cells = <2>;
 		interrupt-controller;
+		clocks = <&mstp9_clks R8A7790_CLK_GPIO3>;
 	};
 
 	gpio4: gpio@e6054000 {
@@ -157,6 +161,7 @@
 		gpio-ranges = <&pfc 0 128 32>;
 		#interrupt-cells = <2>;
 		interrupt-controller;
+		clocks = <&mstp9_clks R8A7790_CLK_GPIO4>;
 	};
 
 	gpio5: gpio@e6055000 {
@@ -168,6 +173,7 @@
 		gpio-ranges = <&pfc 0 160 32>;
 		#interrupt-cells = <2>;
 		interrupt-controller;
+		clocks = <&mstp9_clks R8A7790_CLK_GPIO5>;
 	};
 
 	thermal@e61f0000 {
@@ -757,15 +763,20 @@
 		mstp9_clks: mstp9_clks@e6150994 {
 			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
-			clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>,
+			clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>,
+				 <&cp_clk>, <&cp_clk>, <&cp_clk>,
+				 <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>,
 				 <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>;
 			#clock-cells = <1>;
 			renesas,clock-indices = <
+				R8A7790_CLK_GPIO5 R8A7790_CLK_GPIO4 R8A7790_CLK_GPIO3
+				R8A7790_CLK_GPIO2 R8A7790_CLK_GPIO1 R8A7790_CLK_GPIO0
 				R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD
 				R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1
 				R8A7790_CLK_I2C0
 			>;
 			clock-output-names =
+				"gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0",
 				"rcan1", "rcan0", "qspi_mod", "i2c3", "i2c2", "i2c1", "i2c0";
 		};
 	};
-- 
1.7.9.5

[PATCH 5/7] ARM: shmobile: r8a7791 dtsi: Add GPIO clocks

[Geert Uytterhoeven]

From: Geert Uytterhoeven <geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>

Signed-off-by: Geert Uytterhoeven <geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
---
 arch/arm/boot/dts/r8a7791.dtsi |   19 ++++++++++++++++---
 1 file changed, 16 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 1004355496f2..06972d275171 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -76,6 +76,7 @@
 		gpio-ranges = <&pfc 0 0 32>;
 		#interrupt-cells = <2>;
 		interrupt-controller;
+		clocks = <&mstp9_clks R8A7791_CLK_GPIO0>;
 	};
 
 	gpio1: gpio@e6051000 {
@@ -87,6 +88,7 @@
 		gpio-ranges = <&pfc 0 32 32>;
 		#interrupt-cells = <2>;
 		interrupt-controller;
+		clocks = <&mstp9_clks R8A7791_CLK_GPIO1>;
 	};
 
 	gpio2: gpio@e6052000 {
@@ -98,6 +100,7 @@
 		gpio-ranges = <&pfc 0 64 32>;
 		#interrupt-cells = <2>;
 		interrupt-controller;
+		clocks = <&mstp9_clks R8A7791_CLK_GPIO2>;
 	};
 
 	gpio3: gpio@e6053000 {
@@ -109,6 +112,7 @@
 		gpio-ranges = <&pfc 0 96 32>;
 		#interrupt-cells = <2>;
 		interrupt-controller;
+		clocks = <&mstp9_clks R8A7791_CLK_GPIO3>;
 	};
 
 	gpio4: gpio@e6054000 {
@@ -120,6 +124,7 @@
 		gpio-ranges = <&pfc 0 128 32>;
 		#interrupt-cells = <2>;
 		interrupt-controller;
+		clocks = <&mstp9_clks R8A7791_CLK_GPIO4>;
 	};
 
 	gpio5: gpio@e6055000 {
@@ -131,6 +136,7 @@
 		gpio-ranges = <&pfc 0 160 32>;
 		#interrupt-cells = <2>;
 		interrupt-controller;
+		clocks = <&mstp9_clks R8A7791_CLK_GPIO5>;
 	};
 
 	gpio6: gpio@e6055400 {
@@ -142,6 +148,7 @@
 		gpio-ranges = <&pfc 0 192 32>;
 		#interrupt-cells = <2>;
 		interrupt-controller;
+		clocks = <&mstp9_clks R8A7791_CLK_GPIO6>;
 	};
 
 	gpio7: gpio@e6055800 {
@@ -153,6 +160,7 @@
 		gpio-ranges = <&pfc 0 224 26>;
 		#interrupt-cells = <2>;
 		interrupt-controller;
+		clocks = <&mstp9_clks R8A7791_CLK_GPIO7>;
 	};
 
 	thermal@e61f0000 {
@@ -805,18 +813,23 @@
 		mstp9_clks: mstp9_clks@e6150994 {
 			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
-			clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, <&p_clk>,
+			clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
+				 <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
+				 <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, <&p_clk>,
 				 <&cp_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
 				 <&p_clk>, <&p_clk>;
 			#clock-cells = <1>;
 			renesas,clock-indices = <
+				R8A7791_CLK_GPIO7 R8A7791_CLK_GPIO6 R8A7791_CLK_GPIO5 R8A7791_CLK_GPIO4
+				R8A7791_CLK_GPIO3 R8A7791_CLK_GPIO2 R8A7791_CLK_GPIO1 R8A7791_CLK_GPIO0
 				R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD R8A7791_CLK_I2C5
 				R8A7791_CLK_IICDVFS R8A7791_CLK_I2C4 R8A7791_CLK_I2C3 R8A7791_CLK_I2C2
 				R8A7791_CLK_I2C1 R8A7791_CLK_I2C0
 			>;
 			clock-output-names =
-				"rcan1", "rcan0", "qspi_mod", "i2c5", "i2c6", "i2c4", "i2c3",
-				"i2c2", "i2c1", "i2c0";
+				"gpio7", "gpio6", "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0",
+				"rcan1", "rcan0", "qspi_mod", "i2c5", "i2c6", "i2c4", "i2c3", "i2c2",
+				"i2c1", "i2c0";
 		};
 		mstp11_clks: mstp11_clks@e615099c {
 			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
-- 
1.7.9.5

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[PATCH 6/7] ARM: shmobile: r8a7790 legacy: Add GPIO clocks

[Geert Uytterhoeven]

From: Geert Uytterhoeven <geert+renesas@glider.be>

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: devicetree@vger.kernel.org
---
 arch/arm/mach-shmobile/clock-r8a7790.c |   13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index a6089a6ceabd..2569aab525e4 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -214,6 +214,7 @@ enum {
 	MSTP1009, MSTP1008, MSTP1007, MSTP1006, MSTP1005,
 	MSTP931, MSTP930, MSTP929, MSTP928,
 	MSTP917,
+	MSTP912, MSTP911, MSTP910, MSTP909, MSTP908, MSTP907,
 	MSTP815, MSTP814,
 	MSTP813,
 	MSTP811, MSTP810, MSTP809, MSTP808,
@@ -258,6 +259,12 @@ static struct clk mstp_clks[MSTP_NR] = {
 	[MSTP929] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */
 	[MSTP928] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */
 	[MSTP917] = SH_CLK_MSTP32_STS(&qspi_clk, SMSTPCR9, 17, MSTPSR9, 0), /* QSPI */
+	[MSTP912] = SH_CLK_MSTP32_STS(&cp_clk, SMSTPCR9, 12, MSTPSR9, 0), /* GPIO0 */
+	[MSTP911] = SH_CLK_MSTP32_STS(&cp_clk, SMSTPCR9, 11, MSTPSR9, 0), /* GPIO1 */
+	[MSTP910] = SH_CLK_MSTP32_STS(&cp_clk, SMSTPCR9, 10, MSTPSR9, 0), /* GPIO2 */
+	[MSTP909] = SH_CLK_MSTP32_STS(&cp_clk, SMSTPCR9, 9, MSTPSR9, 0), /* GPIO3 */
+	[MSTP908] = SH_CLK_MSTP32_STS(&cp_clk, SMSTPCR9, 8, MSTPSR9, 0), /* GPIO4 */
+	[MSTP907] = SH_CLK_MSTP32_STS(&cp_clk, SMSTPCR9, 7, MSTPSR9, 0), /* GPIO5 */
 	[MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */
 	[MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */
 	[MSTP813] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR8, 13, MSTPSR8, 0), /* Ether */
@@ -355,6 +362,12 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("i2c-rcar_gen2.1", &mstp_clks[MSTP930]),
 	CLKDEV_DEV_ID("i2c-rcar_gen2.2", &mstp_clks[MSTP929]),
 	CLKDEV_DEV_ID("i2c-rcar_gen2.3", &mstp_clks[MSTP928]),
+	CLKDEV_DEV_ID("gpio_rcar.0", &mstp_clks[MSTP912]),
+	CLKDEV_DEV_ID("gpio_rcar.1", &mstp_clks[MSTP911]),
+	CLKDEV_DEV_ID("gpio_rcar.2", &mstp_clks[MSTP910]),
+	CLKDEV_DEV_ID("gpio_rcar.3", &mstp_clks[MSTP909]),
+	CLKDEV_DEV_ID("gpio_rcar.4", &mstp_clks[MSTP908]),
+	CLKDEV_DEV_ID("gpio_rcar.5", &mstp_clks[MSTP907]),
 	CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]),
 	CLKDEV_DEV_ID("r8a7790-vin.0", &mstp_clks[MSTP811]),
 	CLKDEV_DEV_ID("r8a7790-vin.1", &mstp_clks[MSTP810]),
-- 
1.7.9.5

[PATCH 7/7] ARM: shmobile: r8a7791 legacy: Add GPIO clocks

[Geert Uytterhoeven]

From: Geert Uytterhoeven <geert+renesas@glider.be>

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: devicetree@vger.kernel.org
---
 arch/arm/mach-shmobile/clock-r8a7791.c |   17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
index 5929062aa480..0eed1a0c52c0 100644
--- a/arch/arm/mach-shmobile/clock-r8a7791.c
+++ b/arch/arm/mach-shmobile/clock-r8a7791.c
@@ -172,6 +172,7 @@ enum {
 	MSTP1108, MSTP1107, MSTP1106,
 	MSTP931, MSTP930, MSTP929, MSTP928, MSTP927, MSTP925,
 	MSTP917,
+	MSTP912, MSTP911, MSTP910, MSTP909, MSTP908, MSTP907, MSTP905, MSTP904,
 	MSTP815, MSTP814,
 	MSTP813,
 	MSTP811, MSTP810, MSTP809,
@@ -197,6 +198,14 @@ static struct clk mstp_clks[MSTP_NR] = {
 	[MSTP927] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 27, MSTPSR9, 0), /* I2C4 */
 	[MSTP925] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 25, MSTPSR9, 0), /* I2C5 */
 	[MSTP917] = SH_CLK_MSTP32_STS(&qspi_clk, SMSTPCR9, 17, MSTPSR9, 0), /* QSPI */
+	[MSTP912] = SH_CLK_MSTP32_STS(&cp_clk, SMSTPCR9, 12, MSTPSR9, 0), /* GPIO0 */
+	[MSTP911] = SH_CLK_MSTP32_STS(&cp_clk, SMSTPCR9, 11, MSTPSR9, 0), /* GPIO1 */
+	[MSTP910] = SH_CLK_MSTP32_STS(&cp_clk, SMSTPCR9, 10, MSTPSR9, 0), /* GPIO2 */
+	[MSTP909] = SH_CLK_MSTP32_STS(&cp_clk, SMSTPCR9, 9, MSTPSR9, 0), /* GPIO3 */
+	[MSTP908] = SH_CLK_MSTP32_STS(&cp_clk, SMSTPCR9, 8, MSTPSR9, 0), /* GPIO4 */
+	[MSTP907] = SH_CLK_MSTP32_STS(&cp_clk, SMSTPCR9, 7, MSTPSR9, 0), /* GPIO5 */
+	[MSTP905] = SH_CLK_MSTP32_STS(&cp_clk, SMSTPCR9, 5, MSTPSR9, 0), /* GPIO6 */
+	[MSTP904] = SH_CLK_MSTP32_STS(&cp_clk, SMSTPCR9, 4, MSTPSR9, 0), /* GPIO7 */
 	[MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */
 	[MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */
 	[MSTP813] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR8, 13, MSTPSR8, 0), /* Ether */
@@ -281,6 +290,14 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("i2c-rcar_gen2.3", &mstp_clks[MSTP928]),
 	CLKDEV_DEV_ID("i2c-rcar_gen2.4", &mstp_clks[MSTP927]),
 	CLKDEV_DEV_ID("i2c-rcar_gen2.5", &mstp_clks[MSTP925]),
+	CLKDEV_DEV_ID("gpio_rcar.0", &mstp_clks[MSTP912]),
+	CLKDEV_DEV_ID("gpio_rcar.1", &mstp_clks[MSTP911]),
+	CLKDEV_DEV_ID("gpio_rcar.2", &mstp_clks[MSTP910]),
+	CLKDEV_DEV_ID("gpio_rcar.3", &mstp_clks[MSTP909]),
+	CLKDEV_DEV_ID("gpio_rcar.4", &mstp_clks[MSTP908]),
+	CLKDEV_DEV_ID("gpio_rcar.5", &mstp_clks[MSTP907]),
+	CLKDEV_DEV_ID("gpio_rcar.6", &mstp_clks[MSTP905]),
+	CLKDEV_DEV_ID("gpio_rcar.7", &mstp_clks[MSTP904]),
 	CLKDEV_DEV_ID("r8a7791-ether", &mstp_clks[MSTP813]), /* Ether */
 	CLKDEV_DEV_ID("r8a7791-vin.0", &mstp_clks[MSTP811]),
 	CLKDEV_DEV_ID("r8a7791-vin.1", &mstp_clks[MSTP810]),
-- 
1.7.9.5