From mboxrd@z Thu Jan 1 00:00:00 1970 From: Arnd Bergmann Subject: Re: [PATCH v2] PCI: generic: Add support for Cavium ThunderX PCIe root complexes. Date: Wed, 23 Sep 2015 09:51:30 +0200 Message-ID: <1524364.fcqUh1gtkt@wuerfel> References: <1442967415-13595-1-git-send-email-ddaney.cavm@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7Bit Return-path: In-Reply-To: <1442967415-13595-1-git-send-email-ddaney.cavm@gmail.com> Sender: linux-pci-owner@vger.kernel.org To: David Daney Cc: linux-kernel@vger.kernel.org, Bjorn Helgaas , linux-pci@vger.kernel.org, Will Deacon , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Marc Zyngier , David Daney List-Id: devicetree@vger.kernel.org On Tuesday 22 September 2015 17:16:55 David Daney wrote: > From: David Daney > > The config space for external PCIe root complexes on some Cavium > ThunderX SoCs is very similar to CAM and ECAM, but differs in the > shift values that have to be applied to the bus and devfn numbers to > compose that address window offset. These root complexes also have > the interesting property that there is no root bridge, so the standard > manner of limiting scanning to only the first device doesn't work. We > can use the standard pci-host-generic driver if we make a minor > addition to handle these differences, so we... > > Add a mapping function for ThunderX PCIe root complexes with a bus > shift of 24 and devfn shift of 16. Ignore accesses for devices other > than the first device on the primary bus. > > Document the whole thing in devicetree/bindings/pci/host-generic-pci.txt > > Signed-off-by: David Daney > Acked-by: Will Deacon > Acked-by: Arnd Bergmann