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From: Anson Huang <Anson.Huang@nxp.com>
To: shawnguo@kernel.org, kernel@pengutronix.de,
	fabio.estevam@nxp.com, robh+dt@kernel.org, mark.rutland@arm.com,
	mturquette@baylibre.com, sboyd@kernel.org, stefan@agner.ch,
	adriana.reus@nxp.com, rui.silva@linaro.org
Cc: Linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-clk@vger.kernel.org
Subject: [PATCH V2 3/3] ARM: dts: imx7: correct enet ipg clock
Date: Fri, 18 May 2018 09:01:06 +0800	[thread overview]
Message-ID: <1526605266-18464-3-git-send-email-Anson.Huang@nxp.com> (raw)
In-Reply-To: <1526605266-18464-1-git-send-email-Anson.Huang@nxp.com>

ENET "ipg" clock should be IMX7D_ENETx_IPG_ROOT_CLK
rather than IMX7D_ENET_AXI_ROOT_CLK which is for ENET bus
clock.

Based on Andy Duan's patch from the NXP kernel tree.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
 arch/arm/boot/dts/imx7d.dtsi | 2 +-
 arch/arm/boot/dts/imx7s.dtsi | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
index 200714e..d74dd7f 100644
--- a/arch/arm/boot/dts/imx7d.dtsi
+++ b/arch/arm/boot/dts/imx7d.dtsi
@@ -120,7 +120,7 @@
 			<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
 			<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
 			<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
+		clocks = <&clks IMX7D_ENET2_IPG_ROOT_CLK>,
 			<&clks IMX7D_ENET_AXI_ROOT_CLK>,
 			<&clks IMX7D_ENET2_TIME_ROOT_CLK>,
 			<&clks IMX7D_PLL_ENET_MAIN_125M_CLK>,
diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi
index 4d42335..b90769d 100644
--- a/arch/arm/boot/dts/imx7s.dtsi
+++ b/arch/arm/boot/dts/imx7s.dtsi
@@ -1091,7 +1091,7 @@
 					<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
 					<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
 					<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
+				clocks = <&clks IMX7D_ENET1_IPG_ROOT_CLK>,
 					<&clks IMX7D_ENET_AXI_ROOT_CLK>,
 					<&clks IMX7D_ENET1_TIME_ROOT_CLK>,
 					<&clks IMX7D_PLL_ENET_MAIN_125M_CLK>,
-- 
2.7.4

  parent reply	other threads:[~2018-05-18  1:01 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-18  1:01 [PATCH V2 1/3] clk: imx7d: correct enet phy ref clock gates Anson Huang
2018-05-18  1:01 ` [PATCH V2 2/3] clk: imx7d: correct enet clock CCGR registers Anson Huang
2018-05-18 13:02   ` Stefan Agner
2018-05-21  2:35     ` Anson Huang
2018-05-21  8:14       ` Stefan Agner
2018-05-22 17:56   ` Rob Herring
2018-06-01 19:18   ` Stephen Boyd
2018-05-18  1:01 ` Anson Huang [this message]
2018-05-23  7:58   ` [PATCH V2 3/3] ARM: dts: imx7: correct enet ipg clock Stefan Agner
2018-06-01 19:18   ` Stephen Boyd
2018-05-18 13:03 ` [PATCH V2 1/3] clk: imx7d: correct enet phy ref clock gates Stefan Agner
2018-06-01 19:18 ` Stephen Boyd

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