From mboxrd@z Thu Jan 1 00:00:00 1970 From: CK Hu Subject: Re: [PATCH v4 6/9] drm/mediatek: add ddp component PWM2 Date: Mon, 28 May 2018 15:09:51 +0800 Message-ID: <1527491391.24367.5.camel@mtksdaap41> References: <1527489507-24453-1-git-send-email-stu.hsieh@mediatek.com> <1527489507-24453-7-git-send-email-stu.hsieh@mediatek.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1527489507-24453-7-git-send-email-stu.hsieh@mediatek.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Stu Hsieh Cc: Mark Rutland , devicetree@vger.kernel.org, srv_heupstream@mediatek.com, David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Rob Herring , linux-mediatek@lists.infradead.org, Matthias Brugger , linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org SGksIFN0dToKCk9uIE1vbiwgMjAxOC0wNS0yOCBhdCAxNDozOCArMDgwMCwgU3R1IEhzaWVoIHdy b3RlOgo+IFRoaXMgcGF0Y2ggYWRkIGNvbXBvbmVudCBQV00yCj4gCgpSZXZpZXdlZC1ieTogQ0sg SHUgPGNrLmh1QG1lZGlhdGVrLmNvbT4KCj4gU2lnbmVkLW9mZi1ieTogU3R1IEhzaWVoIDxzdHUu aHNpZWhAbWVkaWF0ZWsuY29tPgo+IC0tLQo+ICBkcml2ZXJzL2dwdS9kcm0vbWVkaWF0ZWsvbXRr X2RybV9kZHBfY29tcC5jIHwgMSArCj4gIGRyaXZlcnMvZ3B1L2RybS9tZWRpYXRlay9tdGtfZHJt X2RkcF9jb21wLmggfCAxICsKPiAgMiBmaWxlcyBjaGFuZ2VkLCAyIGluc2VydGlvbnMoKykKPiAK PiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL21lZGlhdGVrL210a19kcm1fZGRwX2NvbXAu YyBiL2RyaXZlcnMvZ3B1L2RybS9tZWRpYXRlay9tdGtfZHJtX2RkcF9jb21wLmMKPiBpbmRleCBh NWM3YWMyZDE2MmQuLjg2ZThjOWU1ZGY0MSAxMDA2NDQKPiAtLS0gYS9kcml2ZXJzL2dwdS9kcm0v bWVkaWF0ZWsvbXRrX2RybV9kZHBfY29tcC5jCj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL21lZGlh dGVrL210a19kcm1fZGRwX2NvbXAuYwo+IEBAIC0yMzMsNiArMjMzLDcgQEAgc3RhdGljIGNvbnN0 IHN0cnVjdCBtdGtfZGRwX2NvbXBfbWF0Y2ggbXRrX2RkcF9tYXRjaGVzW0REUF9DT01QT05FTlRf SURfTUFYXSA9IHsKPiAgCVtERFBfQ09NUE9ORU5UX09WTDFdCT0geyBNVEtfRElTUF9PVkwsCTEs IE5VTEwgfSwKPiAgCVtERFBfQ09NUE9ORU5UX1BXTTBdCT0geyBNVEtfRElTUF9QV00sCTAsIE5V TEwgfSwKPiAgCVtERFBfQ09NUE9ORU5UX1BXTTFdCT0geyBNVEtfRElTUF9QV00sCTEsIE5VTEwg fSwKPiArCVtERFBfQ09NUE9ORU5UX1BXTTJdCT0geyBNVEtfRElTUF9QV00sCTIsIE5VTEwgfSwK PiAgCVtERFBfQ09NUE9ORU5UX1JETUEwXQk9IHsgTVRLX0RJU1BfUkRNQSwJMCwgTlVMTCB9LAo+ ICAJW0REUF9DT01QT05FTlRfUkRNQTFdCT0geyBNVEtfRElTUF9SRE1BLAkxLCBOVUxMIH0sCj4g IAlbRERQX0NPTVBPTkVOVF9SRE1BMl0JPSB7IE1US19ESVNQX1JETUEsCTIsIE5VTEwgfSwKPiBk aWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL21lZGlhdGVrL210a19kcm1fZGRwX2NvbXAuaCBi L2RyaXZlcnMvZ3B1L2RybS9tZWRpYXRlay9tdGtfZHJtX2RkcF9jb21wLmgKPiBpbmRleCA5YjE5 ZmM0NDIzZjEuLmUwMGMyZTc5OGFiZCAxMDA2NDQKPiAtLS0gYS9kcml2ZXJzL2dwdS9kcm0vbWVk aWF0ZWsvbXRrX2RybV9kZHBfY29tcC5oCj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL21lZGlhdGVr L210a19kcm1fZGRwX2NvbXAuaAo+IEBAIC01Niw2ICs1Niw3IEBAIGVudW0gbXRrX2RkcF9jb21w X2lkIHsKPiAgCUREUF9DT01QT05FTlRfT1ZMMSwKPiAgCUREUF9DT01QT05FTlRfUFdNMCwKPiAg CUREUF9DT01QT05FTlRfUFdNMSwKPiArCUREUF9DT01QT05FTlRfUFdNMiwKPiAgCUREUF9DT01Q T05FTlRfUkRNQTAsCj4gIAlERFBfQ09NUE9ORU5UX1JETUExLAo+ICAJRERQX0NPTVBPTkVOVF9S RE1BMiwKCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpk cmktZGV2ZWwgbWFpbGluZyBsaXN0CmRyaS1kZXZlbEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0 cHM6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9kcmktZGV2ZWwK