From: thor.thayer@linux.intel.com
To: dinguyen@kernel.org
Cc: robh+dt@kernel.org, mark.rutland@arm.com,
devicetree@vger.kernel.org,
Thor Thayer <thor.thayer@linux.intel.com>
Subject: [PATCH 2/2] ARM: dts: Add SPI0 node for Arria10
Date: Tue, 29 May 2018 13:08:39 -0500 [thread overview]
Message-ID: <1527617319-1936-2-git-send-email-thor.thayer@linux.intel.com> (raw)
In-Reply-To: <1527617319-1936-1-git-send-email-thor.thayer@linux.intel.com>
From: Thor Thayer <thor.thayer@linux.intel.com>
Add the SPI0 node for Arria10.
Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
---
arch/arm/boot/dts/socfpga_arria10.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index 9138f834bad4..ee9a5fc616a8 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -587,6 +587,18 @@
status = "disabled";
};
+ spi0: spi@ffda4000 {
+ compatible = "snps,dw-apb-ssi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xffda4000 0x100>;
+ interrupts = <0 101 4>;
+ num-cs = <4>;
+ /*32bit_access;*/
+ clocks = <&spi_m_clk>;
+ status = "disabled";
+ };
+
spi1: spi@ffda5000 {
compatible = "snps,dw-apb-ssi";
#address-cells = <1>;
--
2.7.4
next prev parent reply other threads:[~2018-05-29 18:08 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-29 18:08 [PATCH 1/2] ARM: dts: Fix SPI node for Arria10 thor.thayer
2018-05-29 18:08 ` thor.thayer [this message]
2018-06-21 18:27 ` Thor Thayer
2018-06-22 18:54 ` Dinh Nguyen
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