[PATCH V2 1/3] arm64: tegra: Remove unused interrupt properties

[PATCH V2 1/3] arm64: tegra: Remove unused interrupt properties

[Bhadram Varka]

DWC EQOS on Tegra handles all interrupts through
common interrupt line. So lets remove unused power
and per-channel interrupt properties.

Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
---
 arch/arm64/boot/dts/nvidia/tegra186.dtsi | 11 +----------
 1 file changed, 1 insertion(+), 10 deletions(-)

diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index b762227..252133b 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -41,16 +41,7 @@
 		compatible = "nvidia,tegra186-eqos",
 			     "snps,dwc-qos-ethernet-4.10";
 		reg = <0x0 0x02490000 0x0 0x10000>;
-		interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>, /* common */
-			     <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>, /* power */
-			     <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, /* rx0 */
-			     <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>, /* tx0 */
-			     <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, /* rx1 */
-			     <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>, /* tx1 */
-			     <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, /* rx2 */
-			     <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, /* tx2 */
-			     <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>, /* rx3 */
-			     <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; /* tx3 */
+		interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>; /* common */
 		clocks = <&bpmp TEGRA186_CLK_AXI_CBB>,
 			 <&bpmp TEGRA186_CLK_EQOS_AXI>,
 			 <&bpmp TEGRA186_CLK_EQOS_RX>,
-- 
2.7.4

[PATCH V2 2/3] arm64: tegra: Enable multi-queue for DWC EQOS

[Bhadram Varka]

DWC EQOS supports four MTL queues for Tx and Rx
separately.

Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
---
 arch/arm64/boot/dts/nvidia/tegra186.dtsi | 48 ++++++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index 252133b..48c6caf 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -37,6 +37,52 @@
 		gpio-controller;
 	};
 
+	mtl_rx_setup: rx-queues-config {
+		snps,rx-queues-to-use = <4>;
+		snps,rx-sched-sp;
+		queue0 {
+			snps,dcb-algorithm;
+			snps,map-to-dma-channel = <0x0>;
+			snps,priority = <0x0>;
+		};
+		queue1 {
+			snps,dcb-algorithm;
+			snps,map-to-dma-channel = <0x1>;
+			snps,priority = <0x1>;
+		};
+		queue2 {
+			snps,dcb-algorithm;
+			snps,map-to-dma-channel = <0x2>;
+			snps,priority = <0x2>;
+		};
+		queue3 {
+			snps,dcb-algorithm;
+			snps,map-to-dma-channel = <0x2>;
+			snps,priority = <0x3>;
+		};
+	};
+
+	mtl_tx_setup: tx-queues-config {
+		snps,tx-queues-to-use = <4>;
+		snps,tx-sched-sp;
+		queue0 {
+			snps,dcb-algorithm;
+			snps,priority = <0x0>;
+		};
+		queue1 {
+			snps,dcb-algorithm;
+			snps,priority = <0x1>;
+		};
+		queue2 {
+			snps,dcb-algorithm;
+			snps,priority = <0x2>;
+		};
+		queue3 {
+			snps,dcb-algorithm;
+			snps,priority = <0x3>;
+		};
+	};
+
 	ethernet@2490000 {
 		compatible = "nvidia,tegra186-eqos",
 			     "snps,dwc-qos-ethernet-4.10";
@@ -57,6 +103,8 @@
 		snps,burst-map = <0x7>;
 		snps,txpbl = <32>;
 		snps,rxpbl = <8>;
+		snps,mtl-rx-config = <&mtl_rx_setup>;
+		snps,mtl-tx-config = <&mtl_tx_setup>;
 	};
 
 	memory-controller@2c00000 {
-- 
2.7.4

[PATCH V2 3/3] arm64: tegra: Configure DWC EQOS TxPBL for multi-queue

[Bhadram Varka]

PBL should be limited to half of the Queue size.

For multi-queue: Total MTL queue size 4KB.
PBL = 16, PBLx8 = 1 -> This setting would lead
to an effective burst = 8*16 = 128, which would
mean 128*16B = 2KB (half of queue size)

Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
---
 arch/arm64/boot/dts/nvidia/tegra186.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index 48c6caf..c4d70c5 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -101,7 +101,7 @@
 		snps,write-requests = <1>;
 		snps,read-requests = <3>;
 		snps,burst-map = <0x7>;
-		snps,txpbl = <32>;
+		snps,txpbl = <16>;
 		snps,rxpbl = <8>;
 		snps,mtl-rx-config = <&mtl_rx_setup>;
 		snps,mtl-tx-config = <&mtl_tx_setup>;
-- 
2.7.4