From mboxrd@z Thu Jan  1 00:00:00 1970
From: "Hean-Loong, Ong" <hean.loong.ong@intel.com>
Subject: [PATCHv9 2/3] ARM:socfpga-defconfig Intel FPGA Video and Image
 Processing Suite
Date: Mon,  4 Jun 2018 14:40:03 +0800
Message-ID: <1528094404-3542-3-git-send-email-hean.loong.ong@intel.com>
References: <1528094404-3542-1-git-send-email-hean.loong.ong@intel.com>
Mime-Version: 1.0
Content-Type: text/plain; charset="utf-8"
Content-Transfer-Encoding: base64
Return-path: <dri-devel-bounces@lists.freedesktop.org>
In-Reply-To: <1528094404-3542-1-git-send-email-hean.loong.ong@intel.com>
List-Unsubscribe: <https://lists.freedesktop.org/mailman/options/dri-devel>,
 <mailto:dri-devel-request@lists.freedesktop.org?subject=unsubscribe>
List-Archive: <https://lists.freedesktop.org/archives/dri-devel>
List-Post: <mailto:dri-devel@lists.freedesktop.org>
List-Help: <mailto:dri-devel-request@lists.freedesktop.org?subject=help>
List-Subscribe: <https://lists.freedesktop.org/mailman/listinfo/dri-devel>,
 <mailto:dri-devel-request@lists.freedesktop.org?subject=subscribe>
Errors-To: dri-devel-bounces@lists.freedesktop.org
Sender: "dri-devel" <dri-devel-bounces@lists.freedesktop.org>
To: Rob Herring <robh+dt@kernel.org>, Dinh Nguyen <dinguyen@kernel.org>, Daniel Vetter <daniel.vetter@intel.com>, Laurent Pinchart <laurent.pinchart@ideasonboard.com>, Randy Dunlap <rdunlap@infradead.org>
Cc: devicetree@vger.kernel.org, hean.loong.ong@intel.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Ong@freedesktop.org, linux-arm-kernel@lists.infradead.org
List-Id: devicetree@vger.kernel.org

RnJvbTogT25nIEhlYW4gTG9vbmcgPGhlYW4ubG9vbmcub25nQGludGVsLmNvbT4KCkludGVsIEZQ
R0EgVmlkZW8gYW5kIEltYWdlIFByb2Nlc3NpbmcgU3VpdGUgRnJhbWUgQnVmZmVyIElJCmRyaXZl
ciBjb25maWcgZm9yIEFycmlhIDEwIGRldmtpdCBhbmQgaXRzIHZhcmlhbnRzCgpTaWduZWQtb2Zm
LWJ5OiBPbmcsIEhlYW4gTG9vbmcgPGhlYW4ubG9vbmcub25nQGludGVsLmNvbT4KLS0tCiBhcmNo
L2FybS9jb25maWdzL3NvY2ZwZ2FfZGVmY29uZmlnIHwgICAgNSArKysrKwogMSBmaWxlcyBjaGFu
Z2VkLCA1IGluc2VydGlvbnMoKyksIDAgZGVsZXRpb25zKC0pCgpkaWZmIC0tZ2l0IGEvYXJjaC9h
cm0vY29uZmlncy9zb2NmcGdhX2RlZmNvbmZpZyBiL2FyY2gvYXJtL2NvbmZpZ3Mvc29jZnBnYV9k
ZWZjb25maWcKaW5kZXggMzcxZmNhNC4uMjFkOGQyYiAxMDA2NDQKLS0tIGEvYXJjaC9hcm0vY29u
Zmlncy9zb2NmcGdhX2RlZmNvbmZpZworKysgYi9hcmNoL2FybS9jb25maWdzL3NvY2ZwZ2FfZGVm
Y29uZmlnCkBAIC0xMTIsNiArMTEyLDExIEBAIENPTkZJR19NRkRfQUxURVJBX0ExMFNSPXkKIENP
TkZJR19NRkRfU1RNUEU9eQogQ09ORklHX1JFR1VMQVRPUj15CiBDT05GSUdfUkVHVUxBVE9SX0ZJ
WEVEX1ZPTFRBR0U9eQorQ09ORklHX0RSTT1tCitDT05GSUdfRFJNX0lWSVA9bQorQ09ORklHX0RS
TV9JVklQX09GPW0KK0NPTkZJR19GQj15CitDT05GSUdfRkJfU0lNUExFPXkKIENPTkZJR19VU0I9
eQogQ09ORklHX1VTQl9TVE9SQUdFPXkKIENPTkZJR19VU0JfRFdDMj15Ci0tIAoxLjcuMQoKX19f
X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRldmVsIG1h
aWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMu
ZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVsCg==