From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ludovic Barre Subject: [PATCH 14/19] mmc: mmci: add clock divider for stm32 sdmmc Date: Tue, 12 Jun 2018 15:14:35 +0200 Message-ID: <1528809280-31116-15-git-send-email-ludovic.Barre@st.com> References: <1528809280-31116-1-git-send-email-ludovic.Barre@st.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <1528809280-31116-1-git-send-email-ludovic.Barre@st.com> Sender: linux-kernel-owner@vger.kernel.org To: Ulf Hansson , Rob Herring Cc: Maxime Coquelin , Alexandre Torgue , Gerald Baeza , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-mmc@vger.kernel.org, Ludovic Barre List-Id: devicetree@vger.kernel.org From: Ludovic Barre The STM32 sdmmc variant has a different clock divider. Signed-off-by: Ludovic Barre --- drivers/mmc/host/mmci.c | 2 ++ drivers/mmc/host/mmci.h | 2 ++ 2 files changed, 4 insertions(+) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 9af7db8..e24fd1e 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -1451,6 +1451,8 @@ static int mmci_probe(struct amba_device *dev, */ if (variant->st_clkdiv) mmc->f_min = DIV_ROUND_UP(host->mclk, 257); + else if (variant->stm32_clkdiv) + mmc->f_min = DIV_ROUND_UP(host->mclk, 2046); else if (variant->explicit_mclk_control) mmc->f_min = clk_round_rate(host->clk, 100000); else diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h index 4b4cd1d..227927e 100644 --- a/drivers/mmc/host/mmci.h +++ b/drivers/mmc/host/mmci.h @@ -252,6 +252,7 @@ struct mmci_host; * @data_cmd_enable: enable value for data commands. * @st_sdio: enable ST specific SDIO logic * @st_clkdiv: true if using a ST-specific clock divider algorithm + * @stm32_clkdiv: true if using a STM32-specific clock divider algorithm * @datactrl_mask_ddrmode: ddr mode mask in datactrl register. * @blksz_datactrl16: true if Block size is at b16..b30 position in datactrl * register @@ -312,6 +313,7 @@ struct variant_data { bool datacnt_remain; bool st_sdio; bool st_clkdiv; + bool stm32_clkdiv; bool blksz_datactrl16; bool blksz_datactrl4; u32 pwrreg_powerup; -- 2.7.4