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From: CK Hu <ck.hu@mediatek.com>
To: Stu Hsieh <stu.hsieh@mediatek.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>,
	David Airlie <airlied@linux.ie>, Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org, srv_heupstream@mediatek.com
Subject: Re: [PATCH 15/28] drm/mediatek: add connection from RDMA1 to DSI1
Date: Wed, 13 Jun 2018 14:59:03 +0800	[thread overview]
Message-ID: <1528873143.30263.1.camel@mtksdaap41> (raw)
In-Reply-To: <1528872242.27532.0.camel@mtksdaap41>

Hi, Stu:

On Wed, 2018-06-13 at 14:44 +0800, CK Hu wrote:
> Hi, Stu:
> 
> On Mon, 2018-06-11 at 11:26 +0800, Stu Hsieh wrote:
> > This patch add the connection from RDMA1 to DSI1
> > 
> > Signed-off-by: Stu Hsieh <stu.hsieh@mediatek.com>
> > ---
> >  drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 9 +++++++++
> >  1 file changed, 9 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> > index 4abd5dabeccf..7e4ad5580cf6 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> > @@ -28,6 +28,7 @@
> >  #define DISP_REG_CONFIG_DISP_UFOE_MOUT_EN	0x050
> >  #define DISP_REG_CONFIG_DISP_COLOR0_SEL_IN	0x084
> >  #define DISP_REG_CONFIG_DISP_COLOR1_SEL_IN	0x088
> > +#define DISP_REG_CONFIG_DSIO_SEL_IN		0x0a8
> >  #define DISP_REG_CONFIG_DPI_SEL_IN		0x0ac
> >  #define DISP_REG_CONFIG_DISP_RDMA0_MOUT_EN	0x0c4
> >  #define DISP_REG_CONFIG_DISP_RDMA1_MOUT_EN	0x0c8
> > @@ -84,10 +85,12 @@
> >  #define RDMA0_MOUT_DPI0			0x2
> >  #define RDMA0_MOUT_DSI2			0x4
> >  #define RDMA0_MOUT_DSI3			0x5
> > +#define RDMA1_MOUT_DSI1			0x1
> >  #define RDMA1_MOUT_DPI0			0x2
> >  #define RDMA1_MOUT_DPI1			0x3
> >  #define DPI0_SEL_IN_RDMA1		0x1
> >  #define DPI1_SEL_IN_RDMA1		(0x1 << 8)
> > +#define DSI1_SEL_IN_RDMA1		0x1
> >  #define COLOR1_SEL_IN_OVL1		0x1
> >  
> >  #define OVL_MOUT_EN_RDMA		0x1
> > @@ -170,6 +173,9 @@ static unsigned int mtk_ddp_mout_en(enum mtk_ddp_comp_id cur,
> >  	} else if (cur == DDP_COMPONENT_RDMA0 && next == DDP_COMPONENT_DSI3) {
> >  		*addr = DISP_REG_CONFIG_DISP_RDMA0_MOUT_EN;
> >  		value = RDMA0_MOUT_DSI3;
> > +	} else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DSI1) {
> > +		*addr = DISP_REG_CONFIG_DISP_RDMA1_MOUT_EN;
> > +		value = RDMA1_MOUT_DSI1;
> >  	} else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DPI0) {
> >  		*addr = DISP_REG_CONFIG_DISP_RDMA1_MOUT_EN;
> >  		value = RDMA1_MOUT_DPI0;
> > @@ -198,6 +204,9 @@ static unsigned int mtk_ddp_sel_in(enum mtk_ddp_comp_id cur,
> >  	} else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DPI1) {
> >  		*addr = DISP_REG_CONFIG_DPI_SEL_IN;
> >  		value = DPI1_SEL_IN_RDMA1;
> > +	} else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DSI1) {
> > +		*addr = DISP_REG_CONFIG_DSIO_SEL_IN;
> 
> Does data sheet use the naming 'DSI0'? You use this register to select
> DSI1 input.

This is DSIO not DSI0, so it's OK for me.

Reviewed-by: CK Hu <ck.hu at mediatek.com>

> 
> Regards,
> CK
> 
> > +		value = DSI1_SEL_IN_RDMA1;
> >  	} else if (cur == DDP_COMPONENT_OVL1 && next == DDP_COMPONENT_COLOR1) {
> >  		*addr = DISP_REG_CONFIG_DISP_COLOR1_SEL_IN;
> >  		value = COLOR1_SEL_IN_OVL1;
> 

  reply	other threads:[~2018-06-13  6:59 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-11  3:25 [PATCH v5 00/28] Add support for mediatek SOC MT2712 Stu Hsieh
2018-06-11  3:25 ` [PATCH 01/28] drm/mediatek: update dt-bindings for mt2712 Stu Hsieh
2018-06-11  3:25 ` [PATCH 02/28] drm/mediatek: support maximum 64 mutex mod Stu Hsieh
2018-06-11  3:25 ` [PATCH 03/28] drm/mediatek: add ddp component AAL1 Stu Hsieh
2018-06-11  3:25 ` [PATCH 04/28] drm/mediatek: add ddp component OD1 Stu Hsieh
2018-06-13  5:27   ` CK Hu
2018-06-11  3:25 ` [PATCH 05/28] drm/mediatek: add ddp component PWM1 Stu Hsieh
2018-06-11  3:25 ` [PATCH 06/28] drm/mediatek: add ddp component PWM2 Stu Hsieh
2018-06-11  3:25 ` [PATCH 07/28] drm/mediatek: add component DPI1 Stu Hsieh
2018-06-13  5:29   ` CK Hu
2018-06-11  3:26 ` [PATCH 08/28] drm/mediatek: add component DSI2 Stu Hsieh
2018-06-13  5:30   ` CK Hu
2018-06-11  3:26 ` [PATCH 09/28] drm/mediatek: add component DSI3 Stu Hsieh
2018-06-13  5:31   ` CK Hu
2018-06-11  3:26 ` [PATCH 10/28] drm/mediatek: add connection from OD1 to RDMA1 Stu Hsieh
2018-06-11  3:26 ` [PATCH 11/28] drm/mediatek: add connection from RDMA0 to DPI0 Stu Hsieh
2018-06-13  5:38   ` CK Hu
2018-06-11  3:26 ` [PATCH 12/28] drm/mediatek: add connection from RDMA0 to DSI2 Stu Hsieh
2018-06-13  5:39   ` CK Hu
2018-06-11  3:26 ` [PATCH 13/28] drm/mediatek: add connection from RDMA0 to DSI3 Stu Hsieh
2018-06-13  5:45   ` CK Hu
2018-06-13  7:46     ` Stu Hsieh
2018-06-13  8:05       ` CK Hu
2018-06-13  8:52         ` Stu Hsieh
2018-06-11  3:26 ` [PATCH 14/28] drm/mediatek: add connection from RDMA1 to DPI1 Stu Hsieh
2018-06-13  6:13   ` CK Hu
2018-06-13  7:56     ` Stu Hsieh
2018-06-13  8:27       ` CK Hu
2018-06-13  8:53         ` Stu Hsieh
2018-06-11  3:26 ` [PATCH 15/28] drm/mediatek: add connection from RDMA1 to DSI1 Stu Hsieh
2018-06-13  6:44   ` CK Hu
2018-06-13  6:59     ` CK Hu [this message]
2018-06-11  3:26 ` [PATCH 16/28] drm/mediatek: add connection from RDMA1 to DSI2 Stu Hsieh
2018-06-13  7:00   ` CK Hu
2018-06-11  3:26 ` [PATCH 17/28] drm/mediatek: add connection from RDMA1 to DSI3 Stu Hsieh
2018-06-13  7:04   ` CK Hu
2018-06-11  3:26 ` [PATCH 18/28] drm/mediatek: add connection from RDMA2 to DPI0 Stu Hsieh
2018-06-13  7:07   ` CK Hu
2018-06-11  3:26 ` [PATCH 19/28] drm/mediatek: add connection from RDMA2 to DPI1 Stu Hsieh
2018-06-13  7:13   ` CK Hu
2018-06-13  8:01     ` Stu Hsieh
2018-06-13  8:14       ` CK Hu
2018-06-13  8:58         ` Stu Hsieh
2018-06-13  9:01           ` CK Hu
2018-06-11  3:26 ` [PATCH 20/28] drm/mediatek: add connection from RDMA2 to DSI1 Stu Hsieh
2018-06-13  7:17   ` CK Hu
2018-06-11  3:26 ` [PATCH 21/28] drm/mediatek: add connection from RDMA2 to DSI2 Stu Hsieh
2018-06-13  7:18   ` CK Hu
2018-06-11  3:26 ` [PATCH 22/28] drm/mediatek: add connection from RDMA2 to DSI3 Stu Hsieh
2018-06-13  7:19   ` CK Hu
2018-06-11  3:26 ` [PATCH 23/28] drm/mediatek: add DPI1 support for mutex Stu Hsieh
2018-06-13  7:22   ` CK Hu
2018-06-11  3:26 ` [PATCH 24/28] drm/mediatek: add DSI2 " Stu Hsieh
2018-06-13  7:22   ` CK Hu
2018-06-11  3:26 ` [PATCH 25/28] drm/mediatek: add DSI3 " Stu Hsieh
2018-06-13  7:22   ` CK Hu
2018-06-11  3:26 ` [PATCH 26/28] drm/mediatek: add DPI1/DSI1/DSI2/DSI3 in comp_init Stu Hsieh
2018-06-13  7:35   ` CK Hu
2018-06-13  8:05     ` Stu Hsieh
2018-06-11  3:26 ` [PATCH 27/28] drm/mediatek: add third ddp path Stu Hsieh
2018-06-13  7:38   ` CK Hu
2018-06-11  3:26 ` [PATCH 28/28] drm/mediatek: Add support for mediatek SOC MT2712 Stu Hsieh
2018-06-13  7:48   ` CK Hu

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