From: Michel Pollet <michel.pollet@bp.renesas.com>
To: linux-renesas-soc@vger.kernel.org, Simon Horman <horms@verge.net.au>
Cc: phil.edworthy@renesas.com,
Michel Pollet <buserror+upstream@gmail.com>,
Michel Pollet <michel.pollet@bp.renesas.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v9 4/5] ARM: dts: Renesas RZN1D-DB Board base file
Date: Thu, 14 Jun 2018 11:56:33 +0100 [thread overview]
Message-ID: <1528973829-25493-5-git-send-email-michel.pollet@bp.renesas.com> (raw)
In-Reply-To: <1528973829-25493-1-git-send-email-michel.pollet@bp.renesas.com>
This adds a base device tree file for the RZN1-DB board, with only the
basic support allowing the system to boot to a prompt. Only one UART is
used, with only a single CPU running.
Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts | 28 ++++++++++++++++++++++++++++
2 files changed, 29 insertions(+)
create mode 100644 arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 37a3de7..c07f077 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -819,6 +819,7 @@ dtb-$(CONFIG_ARCH_RENESAS) += \
r8a7793-gose.dtb \
r8a7794-alt.dtb \
r8a7794-silk.dtb \
+ r9a06g032-rzn1d400-db.dtb \
sh73a0-kzm9g.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rv1108-evb.dtb \
diff --git a/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts b/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts
new file mode 100644
index 0000000..4e57ae2
--- /dev/null
+++ b/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the RZN1D-DB Board
+ *
+ * Copyright (C) 2018 Renesas Electronics Europe Limited
+ *
+ */
+
+/dts-v1/;
+
+#include "r9a06g032.dtsi"
+
+/ {
+ model = "RZN1D-DB Board";
+ compatible = "renesas,rzn1d400-db", "renesas,r9a06g032";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ aliases {
+ serial0 = &uart0;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
--
2.7.4
next prev parent reply other threads:[~2018-06-14 10:56 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-14 10:56 [PATCH v9 0/5] arm: Base support for Renesas RZN1D-DB Board Michel Pollet
2018-06-14 10:56 ` [PATCH v9 1/5] dt-bindings: Add the r9a06g032-sysctrl.h file Michel Pollet
2018-06-22 13:21 ` Geert Uytterhoeven
2018-06-14 10:56 ` [PATCH v9 2/5] dt-bindings: clock: renesas,r9a06g032-sysctrl: documentation Michel Pollet
2018-06-20 15:43 ` Rob Herring
2018-06-22 13:27 ` Geert Uytterhoeven
2018-06-14 10:56 ` [PATCH v9 3/5] ARM: dts: Renesas R9A06G032 base device tree file Michel Pollet
2018-06-22 12:14 ` Geert Uytterhoeven
2018-06-22 12:25 ` Marc Zyngier
2018-06-28 12:00 ` Simon Horman
2018-06-28 12:16 ` Simon Horman
2018-06-28 12:45 ` Geert Uytterhoeven
2018-06-29 14:45 ` Simon Horman
2018-06-14 10:56 ` Michel Pollet [this message]
2018-06-28 12:16 ` [PATCH v9 4/5] ARM: dts: Renesas RZN1D-DB Board base file Simon Horman
2018-06-14 10:56 ` [PATCH v9 5/5] clk: renesas: Renesas R9A06G032 clock driver Michel Pollet
2018-06-22 13:29 ` Geert Uytterhoeven
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