From: Michel Pollet <michel.pollet@bp.renesas.com>
To: linux-renesas-soc@vger.kernel.org, Simon Horman <horms@verge.net.au>
Cc: phil.edworthy@renesas.com,
Michel Pollet <buserror+upstream@gmail.com>,
Michel Pollet <michel.pollet@bp.renesas.com>,
Linus Walleij <linus.walleij@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
linux-gpio@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v1 0/5] Renesas R9A06G032 PINCTRL Driver
Date: Thu, 14 Jun 2018 12:00:16 +0100 [thread overview]
Message-ID: <1528974029-29617-1-git-send-email-michel.pollet@bp.renesas.com> (raw)
*WARNING* -- this requires:
+ R9A06G032 base patch v9
+ R9A06G032 SMP patch v5
This implements the pinctrl driver for the R9A06G032. Apart from
the file names, I had to keep using RZN1_ as the headers etc are
already extensively in use -- u-boot, vmworks, cm3 code and threadx
use these constants and the base support to implement pinmux on this
SoC.
Also, there is an existing pretty extensive webapp that allows
configuring the pinmux externally that generates either source
code (for non DT based OSes) or an included .dtsi file for board
specific configs.
Note, I used renesas,rzn1-pinmux node to specify the pinmux constants,
and I also don't use some of the properties documented in
pinctrl-bindings.txt on purpose, as they are too limited for my use
(I need to be able to set, clear, ignore or reset level, pull up/down
and function as the pinmux might be set by another OS/core running
concurently).
v1
+ Just supports fhe UART0 on the DB board.
Michel Pollet (5):
dt-bindings: Add the r9a06g032-pinctrl.h file
dt-bindings: clock: renesas,r9a06g032-pinctrl: documentation
pinctrl: renesas: Renesas R9A06G032 pinctrl driver
ARM: dts: Renesas R9A06G032 pinctrl node
ARM: dts: Renesas RZN1D-DB Board: Add UART0 pinmux node
.../bindings/pinctrl/renesas,r9a06g032-pinctrl.txt | 124 +++
arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts | 13 +
arch/arm/boot/dts/r9a06g032.dtsi | 8 +
drivers/pinctrl/Kconfig | 10 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-r9a06g032.c | 890 +++++++++++++++++++++
include/dt-bindings/pinctrl/r9a06g032-pinctrl.h | 191 +++++
7 files changed, 1237 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pinctrl/renesas,r9a06g032-pinctrl.txt
create mode 100644 drivers/pinctrl/pinctrl-r9a06g032.c
create mode 100644 include/dt-bindings/pinctrl/r9a06g032-pinctrl.h
--
2.7.4
next reply other threads:[~2018-06-14 11:00 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-14 11:00 Michel Pollet [this message]
2018-06-14 11:00 ` [PATCH v1 1/5] dt-bindings: Add the r9a06g032-pinctrl.h file Michel Pollet
2018-06-25 20:47 ` Rob Herring
2018-06-14 11:00 ` [PATCH v1 2/5] dt-bindings: clock: renesas,r9a06g032-pinctrl: documentation Michel Pollet
2018-06-14 12:04 ` jacopo mondi
2018-06-14 12:10 ` Michel Pollet
2018-06-14 12:17 ` Chris Brandt
2018-06-15 8:40 ` jacopo mondi
2018-06-14 11:00 ` [PATCH v1 3/5] pinctrl: renesas: Renesas R9A06G032 pinctrl driver Michel Pollet
2018-06-15 10:59 ` jacopo mondi
2018-06-14 11:00 ` [PATCH v1 4/5] ARM: dts: Renesas R9A06G032 pinctrl node Michel Pollet
2018-06-14 11:42 ` Sergei Shtylyov
2018-06-14 11:00 ` [PATCH v1 5/5] ARM: dts: Renesas RZN1D-DB Board: Add UART0 pinmux node Michel Pollet
2018-06-18 8:46 ` [PATCH v1 0/5] Renesas R9A06G032 PINCTRL Driver Linus Walleij
2018-06-18 8:57 ` Geert Uytterhoeven
2018-06-28 14:10 ` Linus Walleij
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