From mboxrd@z Thu Jan 1 00:00:00 1970 From: CK Hu Subject: Re: [PATCH v6 10/29] drm/mediatek: add the DSI1 for component init condition Date: Tue, 19 Jun 2018 16:00:45 +0800 Message-ID: <1529395245.26480.3.camel@mtksdaap41> References: <1529393670-26862-1-git-send-email-stu.hsieh@mediatek.com> <1529393670-26862-11-git-send-email-stu.hsieh@mediatek.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1529393670-26862-11-git-send-email-stu.hsieh@mediatek.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Stu Hsieh Cc: Mark Rutland , devicetree@vger.kernel.org, srv_heupstream@mediatek.com, David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Rob Herring , linux-mediatek@lists.infradead.org, Matthias Brugger , linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org T24gVHVlLCAyMDE4LTA2LTE5IGF0IDE1OjM0ICswODAwLCBTdHUgSHNpZWggd3JvdGU6Cj4gVGhp cyBwYXRjaCBhZGQgdGhlIERTSTEgZm9yIGNvbXBvbmVudCBpbml0IGNvbmRpdGlvbgo+IAoKUmV2 aWV3ZWQtYnk6IENLIEh1IDxjay5odUBtZWRpYXRlay5jb20+Cgo+IFNpZ25lZC1vZmYtYnk6IFN0 dSBIc2llaCA8c3R1LmhzaWVoQG1lZGlhdGVrLmNvbT4KPiAtLS0KPiAgZHJpdmVycy9ncHUvZHJt L21lZGlhdGVrL210a19kcm1fZGRwX2NvbXAuYyB8IDEgKwo+ICAxIGZpbGUgY2hhbmdlZCwgMSBp bnNlcnRpb24oKykKPiAKPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL21lZGlhdGVrL210 a19kcm1fZGRwX2NvbXAuYyBiL2RyaXZlcnMvZ3B1L2RybS9tZWRpYXRlay9tdGtfZHJtX2RkcF9j b21wLmMKPiBpbmRleCAxN2I2ODE2ODY0NzEuLmZmOTc0ZDgyYTRhNiAxMDA2NDQKPiAtLS0gYS9k cml2ZXJzL2dwdS9kcm0vbWVkaWF0ZWsvbXRrX2RybV9kZHBfY29tcC5jCj4gKysrIGIvZHJpdmVy cy9ncHUvZHJtL21lZGlhdGVrL210a19kcm1fZGRwX2NvbXAuYwo+IEBAIC0yODAsNiArMjgwLDcg QEAgaW50IG10a19kZHBfY29tcF9pbml0KHN0cnVjdCBkZXZpY2UgKmRldiwgc3RydWN0IGRldmlj ZV9ub2RlICpub2RlLAo+ICAJICAgIGNvbXBfaWQgPT0gRERQX0NPTVBPTkVOVF9EUEkwIHx8Cj4g IAkgICAgY29tcF9pZCA9PSBERFBfQ09NUE9ORU5UX0RQSTEgfHwKPiAgCSAgICBjb21wX2lkID09 IEREUF9DT01QT05FTlRfRFNJMCB8fAo+ICsJICAgIGNvbXBfaWQgPT0gRERQX0NPTVBPTkVOVF9E U0kxIHx8Cj4gIAkgICAgY29tcF9pZCA9PSBERFBfQ09NUE9ORU5UX0RTSTIgfHwKPiAgCSAgICBj b21wX2lkID09IEREUF9DT01QT05FTlRfRFNJMyB8fAo+ICAJICAgIGNvbXBfaWQgPT0gRERQX0NP TVBPTkVOVF9QV00wKSB7CgoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX18KZHJpLWRldmVsIG1haWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0 b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJp LWRldmVsCg==