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From: CK Hu <ck.hu@mediatek.com>
To: Stu Hsieh <stu.hsieh@mediatek.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org, srv_heupstream@mediatek.com,
	David Airlie <airlied@linux.ie>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	Rob Herring <robh+dt@kernel.org>,
	linux-mediatek@lists.infradead.org,
	Matthias Brugger <matthias.bgg@gmail.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v6 20/29] drm/mediatek: add connection from RDMA2 to DPI0
Date: Tue, 19 Jun 2018 16:42:49 +0800	[thread overview]
Message-ID: <1529397769.26480.16.camel@mtksdaap41> (raw)
In-Reply-To: <1529393670-26862-21-git-send-email-stu.hsieh@mediatek.com>

On Tue, 2018-06-19 at 15:34 +0800, Stu Hsieh wrote:
> This patch add the connection from RDMA2 to DPI0
> 

Reviewed-by: CK Hu <ck.hu@mediatek.com>

> Signed-off-by: Stu Hsieh <stu.hsieh@mediatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> index d0d5f337ce14..c88742a6c2b9 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> @@ -31,6 +31,7 @@
>  #define DISP_REG_CONFIG_DSIE_SEL_IN		0x0a4
>  #define DISP_REG_CONFIG_DSIO_SEL_IN		0x0a8
>  #define DISP_REG_CONFIG_DPI_SEL_IN		0x0ac
> +#define DISP_REG_CONFIG_DISP_RDMA2_SOUT		0x0b8
>  #define DISP_REG_CONFIG_DISP_RDMA0_SOUT_EN	0x0c4
>  #define DISP_REG_CONFIG_DISP_RDMA1_SOUT_EN	0x0c8
>  #define DISP_REG_CONFIG_MMSYS_CG_CON0		0x100
> @@ -91,7 +92,9 @@
>  #define RDMA1_SOUT_DSI1			0x1
>  #define RDMA1_SOUT_DSI2			0x4
>  #define RDMA1_SOUT_DSI3			0x5
> +#define RDMA2_SOUT_DPI0			0x2
>  #define DPI0_SEL_IN_RDMA1		0x1
> +#define DPI0_SEL_IN_RDMA2		0x3
>  #define DPI1_SEL_IN_RDMA1		(0x1 << 8)
>  #define DSI1_SEL_IN_RDMA1		0x1
>  #define DSI2_SEL_IN_RDMA1		(0x1 << 16)
> @@ -193,6 +196,9 @@ static unsigned int mtk_ddp_mout_en(enum mtk_ddp_comp_id cur,
>  	} else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DPI1) {
>  		*addr = DISP_REG_CONFIG_DISP_RDMA1_SOUT_EN;
>  		value = RDMA1_SOUT_DPI1;
> +	} else if (cur == DDP_COMPONENT_RDMA2 && next == DDP_COMPONENT_DPI0) {
> +		*addr = DISP_REG_CONFIG_DISP_RDMA2_SOUT;
> +		value = RDMA2_SOUT_DPI0;
>  	} else {
>  		value = 0;
>  	}
> @@ -224,6 +230,9 @@ static unsigned int mtk_ddp_sel_in(enum mtk_ddp_comp_id cur,
>  	} else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DSI3) {
>  		*addr = DISP_REG_CONFIG_DSIO_SEL_IN;
>  		value = DSI3_SEL_IN_RDMA1;
> +	} else if (cur == DDP_COMPONENT_RDMA2 && next == DDP_COMPONENT_DPI0) {
> +		*addr = DISP_REG_CONFIG_DPI_SEL_IN;
> +		value = DPI0_SEL_IN_RDMA2;
>  	} else if (cur == DDP_COMPONENT_OVL1 && next == DDP_COMPONENT_COLOR1) {
>  		*addr = DISP_REG_CONFIG_DISP_COLOR1_SEL_IN;
>  		value = COLOR1_SEL_IN_OVL1;


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  reply	other threads:[~2018-06-19  8:42 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-19  7:34 [PATCH v6 00/29] Add support for mediatek SOC MT2712 Stu Hsieh
2018-06-19  7:34 ` [PATCH v6 01/29] drm/mediatek: update dt-bindings for mt2712 Stu Hsieh
2018-06-19  7:34 ` [PATCH v6 02/29] drm/mediatek: support maximum 64 mutex mod Stu Hsieh
2018-06-19  7:34 ` [PATCH v6 03/29] drm/mediatek: add ddp component AAL1 Stu Hsieh
2018-06-19  7:34 ` [PATCH v6 04/29] drm/mediatek: add ddp component OD1 Stu Hsieh
2018-06-19  7:34 ` [PATCH v6 05/29] drm/mediatek: add ddp component PWM1 Stu Hsieh
2018-06-19  7:34 ` [PATCH v6 06/29] drm/mediatek: add ddp component PWM2 Stu Hsieh
2018-06-19  7:34 ` [PATCH v6 07/29] drm/mediatek: add component DPI1 Stu Hsieh
2018-06-19  7:58   ` CK Hu
2018-06-19  7:34 ` [PATCH v6 08/29] drm/mediatek: add component DSI2 Stu Hsieh
2018-06-19  7:58   ` CK Hu
2018-06-19  7:34 ` [PATCH v6 09/29] drm/mediatek: add component DSI3 Stu Hsieh
2018-06-19  7:59   ` CK Hu
2018-06-19  7:34 ` [PATCH v6 10/29] drm/mediatek: add the DSI1 for component init condition Stu Hsieh
2018-06-19  8:00   ` CK Hu
2018-06-19  7:34 ` [PATCH v6 11/29] drm/mediatek: add connection from OD1 to RDMA1 Stu Hsieh
2018-06-19  7:34 ` [PATCH v6 12/29] drm/mediatek: Update the definition of connection from RDMA1 to DPI0 Stu Hsieh
2018-06-19  8:20   ` CK Hu
2018-06-20  8:14     ` Stu Hsieh
2018-06-19  7:34 ` [PATCH v6 13/29] drm/mediatek: add connection from RDMA0 " Stu Hsieh
2018-06-19  8:24   ` CK Hu
2018-06-19  7:34 ` [PATCH v6 14/29] drm/mediatek: add connection from RDMA0 to DSI2 Stu Hsieh
2018-06-19  8:25   ` CK Hu
2018-06-19  7:34 ` [PATCH v6 15/29] drm/mediatek: add connection from RDMA0 to DSI3 Stu Hsieh
2018-06-19  8:26   ` CK Hu
2018-06-19  7:34 ` [PATCH v6 16/29] drm/mediatek: add connection from RDMA1 to DPI1 Stu Hsieh
2018-06-19  8:28   ` CK Hu
2018-06-19  7:34 ` [PATCH v6 17/29] drm/mediatek: add connection from RDMA1 to DSI1 Stu Hsieh
2018-06-19  8:39   ` CK Hu
2018-06-19  7:34 ` [PATCH v6 18/29] drm/mediatek: add connection from RDMA1 to DSI2 Stu Hsieh
2018-06-19  8:40   ` CK Hu
2018-06-19  7:34 ` [PATCH v6 19/29] drm/mediatek: add connection from RDMA1 to DSI3 Stu Hsieh
2018-06-19  8:41   ` CK Hu
2018-06-19  7:34 ` [PATCH v6 20/29] drm/mediatek: add connection from RDMA2 to DPI0 Stu Hsieh
2018-06-19  8:42   ` CK Hu [this message]
2018-06-19  7:34 ` [PATCH v6 21/29] drm/mediatek: add connection from RDMA2 to DPI1 Stu Hsieh
2018-06-19  8:43   ` CK Hu
2018-06-19  7:34 ` [PATCH v6 22/29] drm/mediatek: add connection from RDMA2 to DSI1 Stu Hsieh
2018-06-19  8:44   ` CK Hu
2018-06-19  7:34 ` [PATCH v6 23/29] drm/mediatek: add connection from RDMA2 to DSI2 Stu Hsieh
2018-06-19  8:46   ` CK Hu
2018-06-19  7:34 ` [PATCH v6 24/29] drm/mediatek: add connection from RDMA2 to DSI3 Stu Hsieh
2018-06-19  8:47   ` CK Hu
2018-06-19  7:34 ` [PATCH v6 25/29] drm/mediatek: add DPI1 support for mutex Stu Hsieh
2018-06-19  7:34 ` [PATCH v6 26/29] drm/mediatek: add DSI2 " Stu Hsieh
2018-06-19  7:34 ` [PATCH v6 27/29] drm/mediatek: add DSI3 " Stu Hsieh
2018-06-19  7:34 ` [PATCH v6 28/29] drm/mediatek: add third ddp path Stu Hsieh
2018-06-19  7:34 ` [PATCH v6 29/29] drm/mediatek: Add support for mediatek SOC MT2712 Stu Hsieh

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