From: Fabio Estevam <fabio.estevam@nxp.com>
To: shawnguo@kernel.org
Cc: devicetree@vger.kernel.org, Fabio Estevam <fabio.estevam@nxp.com>,
robh+dt@kernel.org, kernel@pengutronix.de,
sebastian.reichel@collabora.co.uk,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 1/6] dt-bindings: freescale: Add bindings for the tigerp module
Date: Tue, 10 Jul 2018 13:08:42 -0300 [thread overview]
Message-ID: <1531238927-19579-1-git-send-email-fabio.estevam@nxp.com> (raw)
Add bindings for the tigerp module present on i.MX51.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
---
Changes since v2:
- None
Documentation/devicetree/bindings/arm/freescale/tigerp.txt | 12 ++++++++++++
1 file changed, 12 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/freescale/tigerp.txt
diff --git a/Documentation/devicetree/bindings/arm/freescale/tigerp.txt b/Documentation/devicetree/bindings/arm/freescale/tigerp.txt
new file mode 100644
index 0000000..19e2aad
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/freescale/tigerp.txt
@@ -0,0 +1,12 @@
+* Freescale Tigerp platform module
+
+Required properties:
+- compatible : Should be "fsl,imx51-tigerp"
+- reg : Address and length of the register set for the device
+
+Example:
+
+tigerp: tigerp@83fa0000 {
+ compatible = "fsl,imx51-tigerp";
+ reg = <0x83fa0000 0x28>;
+};
--
2.7.4
next reply other threads:[~2018-07-10 16:08 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-10 16:08 Fabio Estevam [this message]
2018-07-10 16:08 ` [PATCH v3 2/6] ARM: dts: imx51: Add PMU support Fabio Estevam
2018-07-10 16:08 ` [PATCH v3 3/6] ARM: dts: imx51: Add tigerp support Fabio Estevam
2018-07-10 16:08 ` [PATCH v3 4/6] ARM: dts: imx53: " Fabio Estevam
2018-07-10 16:08 ` [PATCH v3 5/6] ARM: dts: imx53: Add a label for the PMU node Fabio Estevam
2018-07-10 16:08 ` [PATCH v3 6/6] ARM: mx5: Set the DBGEN bit in ARM_GPC register Fabio Estevam
2018-07-10 16:23 ` Sebastian Reichel
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