* [PATCH] pinctrl: tegra: fix spelling in devicetree binding document
@ 2018-07-20 7:52 Marcel Ziswiler
2018-07-20 8:12 ` Jon Hunter
0 siblings, 1 reply; 3+ messages in thread
From: Marcel Ziswiler @ 2018-07-20 7:52 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Linus Walleij,
linux-gpio, Rob Herring, Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
This fixes a spelling mistake.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt
index ecb5c0d25218..f4d06bb0b55a 100644
--- a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt
+++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt
@@ -17,7 +17,7 @@ Tegra124 adds the following optional properties for pin configuration subnodes.
The macros for options are defined in the
include/dt-binding/pinctrl/pinctrl-tegra.h.
- nvidia,enable-input: Integer. Enable the pin's input path.
- enable :TEGRA_PIN_ENABLE0 and
+ enable :TEGRA_PIN_ENABLE and
disable or output only: TEGRA_PIN_DISABLE.
- nvidia,open-drain: Integer.
enable: TEGRA_PIN_ENABLE.
--
2.14.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] pinctrl: tegra: fix spelling in devicetree binding document
2018-07-20 7:52 [PATCH] pinctrl: tegra: fix spelling in devicetree binding document Marcel Ziswiler
@ 2018-07-20 8:12 ` Jon Hunter
2018-07-20 8:24 ` Marcel Ziswiler
0 siblings, 1 reply; 3+ messages in thread
From: Jon Hunter @ 2018-07-20 8:12 UTC (permalink / raw)
To: Marcel Ziswiler, devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Linus Walleij, linux-gpio,
Rob Herring, Mark Rutland
On 20/07/18 08:52, Marcel Ziswiler wrote:
> From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
>
> This fixes a spelling mistake.
>
> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
>
> ---
>
> Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt
> index ecb5c0d25218..f4d06bb0b55a 100644
> --- a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt
> +++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt
> @@ -17,7 +17,7 @@ Tegra124 adds the following optional properties for pin configuration subnodes.
> The macros for options are defined in the
> include/dt-binding/pinctrl/pinctrl-tegra.h.
> - nvidia,enable-input: Integer. Enable the pin's input path.
> - enable :TEGRA_PIN_ENABLE0 and
> + enable :TEGRA_PIN_ENABLE and
> disable or output only: TEGRA_PIN_DISABLE.
> - nvidia,open-drain: Integer.
> enable: TEGRA_PIN_ENABLE.
Thanks for fixing! Can you also fix up the one in nvidia,tegra210-pinmux.txt as well?
Cheers!
Jon
--
nvpublic
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] pinctrl: tegra: fix spelling in devicetree binding document
2018-07-20 8:12 ` Jon Hunter
@ 2018-07-20 8:24 ` Marcel Ziswiler
0 siblings, 0 replies; 3+ messages in thread
From: Marcel Ziswiler @ 2018-07-20 8:24 UTC (permalink / raw)
To: jonathanh@nvidia.com, linux-kernel@vger.kernel.org,
linux-tegra@vger.kernel.org, devicetree@vger.kernel.org
Cc: robh+dt@kernel.org, mark.rutland@arm.com,
linux-gpio@vger.kernel.org, thierry.reding@gmail.com,
linus.walleij@linaro.org
On Fri, 2018-07-20 at 09:12 +0100, Jon Hunter wrote:
> On 20/07/18 08:52, Marcel Ziswiler wrote:
> > From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> >
> > This fixes a spelling mistake.
> >
> > Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> >
> > ---
> >
> > Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-
> > pinmux.txt | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-
> > pinmux.txt
> > b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-
> > pinmux.txt
> > index ecb5c0d25218..f4d06bb0b55a 100644
> > --- a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-
> > pinmux.txt
> > +++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-
> > pinmux.txt
> > @@ -17,7 +17,7 @@ Tegra124 adds the following optional properties
> > for pin configuration subnodes.
> > The macros for options are defined in the
> > include/dt-binding/pinctrl/pinctrl-tegra.h.
> > - nvidia,enable-input: Integer. Enable the pin's input path.
> > - enable :TEGRA_PIN_ENABLE0 and
> > + enable :TEGRA_PIN_ENABLE and
> > disable or output only: TEGRA_PIN_DISABLE.
> > - nvidia,open-drain: Integer.
> > enable: TEGRA_PIN_ENABLE.
>
> Thanks for fixing! Can you also fix up the one in nvidia,tegra210-
> pinmux.txt as well?
Sure, that reminds me to always grep through the whole tree for such
curiosities (;-p).
I just sent out a v2.
> Cheers!
> Jon
^ permalink raw reply [flat|nested] 3+ messages in thread
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2018-07-20 7:52 [PATCH] pinctrl: tegra: fix spelling in devicetree binding document Marcel Ziswiler
2018-07-20 8:12 ` Jon Hunter
2018-07-20 8:24 ` Marcel Ziswiler
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