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From: Aapo Vienamo <avienamo@nvidia.com>
To: Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Mikko Perttunen <mperttunen@nvidia.com>,
	Laxman Dewangan <ldewangan@nvidia.com>
Cc: Aapo Vienamo <avienamo@nvidia.com>,
	devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v5 2/7] soc/tegra: pmc: Factor out DPD register bit calculation
Date: Fri, 20 Jul 2018 13:59:10 +0300	[thread overview]
Message-ID: <1532084355-31482-3-git-send-email-avienamo@nvidia.com> (raw)
In-Reply-To: <1532084355-31482-1-git-send-email-avienamo@nvidia.com>

Factor out the the code to calculate the correct DPD register and bit
number for a given pad. This logic will be needed to query the status
register.

Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
---
 drivers/soc/tegra/pmc.c | 20 +++++++++++++++++---
 1 file changed, 17 insertions(+), 3 deletions(-)

diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
index f926332..393ca72 100644
--- a/drivers/soc/tegra/pmc.c
+++ b/drivers/soc/tegra/pmc.c
@@ -922,11 +922,12 @@ tegra_io_pad_find(struct tegra_pmc *pmc, enum tegra_io_pad id)
 	return NULL;
 }
 
-static int tegra_io_pad_prepare(enum tegra_io_pad id, unsigned long *request,
-				unsigned long *status, u32 *mask)
+static int tegra_io_pad_get_dpd_register_bit(enum tegra_io_pad id,
+					     unsigned long *request,
+					     unsigned long *status,
+					     u32 *mask)
 {
 	const struct tegra_io_pad_soc *pad;
-	unsigned long rate, value;
 
 	pad = tegra_io_pad_find(pmc, id);
 	if (!pad) {
@@ -947,6 +948,19 @@ static int tegra_io_pad_prepare(enum tegra_io_pad id, unsigned long *request,
 		*request = pmc->soc->regs->dpd2_req;
 	}
 
+	return 0;
+}
+
+static int tegra_io_pad_prepare(enum tegra_io_pad id, unsigned long *request,
+				unsigned long *status, u32 *mask)
+{
+	unsigned long rate, value;
+	int err;
+
+	err = tegra_io_pad_get_dpd_register_bit(id, request, status, mask);
+	if (err)
+		return err;
+
 	if (pmc->clk) {
 		rate = clk_get_rate(pmc->clk);
 		if (!rate) {
-- 
2.7.4

  parent reply	other threads:[~2018-07-20 10:59 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-20 10:59 [PATCH v5 0/7] Tegra PMC pinctrl pad configuration Aapo Vienamo
2018-07-20 10:59 ` [PATCH v5 1/7] soc/tegra: pmc: Fix pad voltage configuration for Tegra186 Aapo Vienamo
2018-07-20 10:59 ` Aapo Vienamo [this message]
2018-07-20 10:59 ` [PATCH v5 3/7] soc/tegra: pmc: Implement tegra_io_pad_is_powered() Aapo Vienamo
2018-07-20 10:59 ` [PATCH v5 4/7] soc/tegra: pmc: Use X macro to generate IO pad tables Aapo Vienamo
2018-07-20 10:59 ` [PATCH v5 5/7] dt-bindings: Add Tegra PMC pad configuration bindings Aapo Vienamo
2018-07-25 14:50   ` Rob Herring
2018-07-20 10:59 ` [PATCH v5 6/7] soc/tegra: pmc: Remove public pad voltage APIs Aapo Vienamo
2018-07-20 10:59 ` [PATCH v5 7/7] soc/tegra: pmc: Implement pad configuration via pinctrl Aapo Vienamo

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