From: Aapo Vienamo <avienamo@nvidia.com>
To: Ulf Hansson <ulf.hansson@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Mikko Perttunen <mperttunen@nvidia.com>
Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
Aapo Vienamo <avienamo@nvidia.com>
Subject: [PATCH 05/10] dt-bindings: Add Tegra SDHCI pad pdpu offset bindings
Date: Tue, 24 Jul 2018 17:34:21 +0300 [thread overview]
Message-ID: <1532442865-6391-4-git-send-email-avienamo@nvidia.com> (raw)
In-Reply-To: <1532442865-6391-1-git-send-email-avienamo@nvidia.com>
Add bindings documentation for pad pull up and pull down offset values to be
programmed before executing automatic pad drive strength calibration.
Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
---
.../bindings/mmc/nvidia,tegra20-sdhci.txt | 32 ++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
index 90c214d..949f616 100644
--- a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
+++ b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
@@ -24,6 +24,7 @@ Required properties:
Optional properties:
- power-gpios : Specify GPIOs for power control
+Optional properties for Tegra210 and Tegra186:
Example:
sdhci@c8000200 {
@@ -45,6 +46,33 @@ Optional properties for Tegra210 and Tegra186:
for controllers supporting multiple voltage levels. The order of names
should correspond to the pin configuration states in pinctrl-0 and
pinctrl-1.
+- pad-autocal-pull-up-offset-3v3, pad-autocal-pull-down-offset-3v3 :
+ Specify drive strength calibration offsets for 3.3 V signaling modes.
+- pad-autocal-pull-up-offset-1v8, pad-autocal-pull-down-offset-1v8 :
+ Specify drive strength calibration offsets for 1.8 V signaling modes.
+- pad-autocal-pull-up-offset-3v3-timeout,
+ pad-autocal-pull-down-offset-3v3-timeout : Specify drive strength
+ used as a fallback in case the automatic calibration times out on a
+ 3.3 V signaling mode.
+- pad-autocal-pull-up-offset-1v8-timeout,
+ pad-autocal-pull-down-offset-1v8-timeout : Specify drive strength
+ used as a fallback in case the automatic calibration times out on a
+ 1.8 V signaling mode.
+- pad-autocal-pull-up-offset-sdr104,
+ pad-autocal-pull-down-offset-sdr104 : Specify drive strength
+ calibration offsets for SDR104 mode.
+- pad-autocal-pull-up-offset-hs400,
+ pad-autocal-pull-down-offset-hs400 : Specify drive strength
+ calibration offsets for HS400 mode.
+
+ Notes on the pad calibration pull up and pulldown offset values:
+ - The property values are drive codes which are programmed into the
+ PD_OFFSET and PU_OFFSET sections of the
+ SDHCI_TEGRA_AUTO_CAL_CONFIG register.
+ - A higher value corresponds to higher drive strength. Please refer
+ to the reference manual of the SoC for correct values.
+ - The SDR104 and HS400 timing specific values are used in
+ corresponding modes if specified.
Example:
sdhci@700b0000 {
@@ -58,5 +86,9 @@ sdhci@700b0000 {
pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
pinctrl-0 = <&sdmmc1_3v3>;
pinctrl-1 = <&sdmmc1_1v8>;
+ pad-autocal-pull-up-offset-3v3 = <0x00>;
+ pad-autocal-pull-down-offset-3v3 = <0x7d>;
+ pad-autocal-pull-up-offset-1v8 = <0x7b>;
+ pad-autocal-pull-down-offset-1v8 = <0x7b>;
status = "disabled";
};
--
2.7.4
next prev parent reply other threads:[~2018-07-24 14:34 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-24 14:29 [PATCH 00/10] Update the pad autocal procedure Aapo Vienamo
2018-07-24 14:29 ` [PATCH 01/10] mmc: tegra: Poll for calibration completion Aapo Vienamo
2018-07-25 7:04 ` Mikko Perttunen
2018-07-24 14:34 ` [PATCH 02/10] mmc: tegra: Set calibration pad voltage reference Aapo Vienamo
2018-07-24 14:34 ` [PATCH 03/10] mmc: tegra: Power on the calibration pad Aapo Vienamo
2018-07-25 7:11 ` Mikko Perttunen
2018-07-24 14:34 ` [PATCH 04/10] mmc: tegra: Disable card clock during pad calibration Aapo Vienamo
2018-07-25 7:14 ` Mikko Perttunen
2018-07-24 14:34 ` Aapo Vienamo [this message]
2018-07-25 7:16 ` [PATCH 05/10] dt-bindings: Add Tegra SDHCI pad pdpu offset bindings Mikko Perttunen
2018-07-24 14:34 ` [PATCH 06/10] mmc: tegra: Program pad autocal offsets from dt Aapo Vienamo
2018-07-25 7:24 ` Mikko Perttunen
2018-07-24 14:34 ` [PATCH 07/10] arm64: dts: tegra186: Add sdmmc pad auto calibration offsets Aapo Vienamo
2018-07-24 14:34 ` [PATCH 08/10] arm64: dts: tegra210: " Aapo Vienamo
2018-07-24 14:34 ` [PATCH 09/10] mmc: tegra: Perform pad calibration after voltage switch Aapo Vienamo
2018-07-25 7:25 ` Mikko Perttunen
2018-07-25 10:43 ` Aapo Vienamo
2018-07-25 7:08 ` [PATCH 02/10] mmc: tegra: Set calibration pad voltage reference Mikko Perttunen
2018-07-25 10:00 ` Aapo Vienamo
2018-07-25 12:06 ` [PATCH 00/10] Update the pad autocal procedure Peter Geis
2018-07-25 14:28 ` Aapo Vienamo
2018-07-25 14:27 ` [PATCH 10/10] mmc: tegra: Enable pad calibration on Tegra210 and Tegra186 Aapo Vienamo
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1532442865-6391-4-git-send-email-avienamo@nvidia.com \
--to=avienamo@nvidia.com \
--cc=adrian.hunter@intel.com \
--cc=devicetree@vger.kernel.org \
--cc=jonathanh@nvidia.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mmc@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=mperttunen@nvidia.com \
--cc=robh+dt@kernel.org \
--cc=thierry.reding@gmail.com \
--cc=ulf.hansson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).