From: Aapo Vienamo <avienamo@nvidia.com>
To: Ulf Hansson <ulf.hansson@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Mikko Perttunen <mperttunen@nvidia.com>
Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
Aapo Vienamo <avienamo@nvidia.com>
Subject: [PATCH v2 3/8] mmc: tegra: Implement HS400 enhanced strobe
Date: Fri, 10 Aug 2018 21:14:00 +0300 [thread overview]
Message-ID: <1533924845-1466-4-git-send-email-avienamo@nvidia.com> (raw)
In-Reply-To: <1533924845-1466-1-git-send-email-avienamo@nvidia.com>
Implement eMMC HS400 enhanced strobe. Enhanced strobe is an alternative
mechanism to the HS400 tuning procedure.
Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
---
drivers/mmc/host/sdhci-tegra.c | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index 6ec92bc..c0bb0f0 100644
--- a/drivers/mmc/host/sdhci-tegra.c
+++ b/drivers/mmc/host/sdhci-tegra.c
@@ -43,6 +43,9 @@
#define SDHCI_CLOCK_CTRL_PADPIPE_CLKEN_OVERRIDE BIT(3)
#define SDHCI_CLOCK_CTRL_SPI_MODE_CLKEN_OVERRIDE BIT(2)
+#define SDHCI_TEGRA_VENDOR_SYS_SW_CTRL 0x104
+#define SDHCI_TEGRA_SYS_SW_CTRL_ENHANCED_STROBE BIT(31)
+
#define SDHCI_TEGRA_VENDOR_CAP_OVERRIDES 0x10c
#define SDHCI_TEGRA_CAP_OVERRIDES_DQS_TRIM_MASK 0x00003f00
#define SDHCI_TEGRA_CAP_OVERRIDES_DQS_TRIM_SHIFT 8
@@ -272,6 +275,23 @@ static void tegra_sdhci_set_tap(struct sdhci_host *host, unsigned int tap)
}
}
+static void tegra_sdhci_hs400_enhanced_strobe(struct mmc_host *mmc,
+ struct mmc_ios *ios)
+{
+ struct sdhci_host *host = mmc_priv(mmc);
+ u32 val;
+
+ val = sdhci_readl(host, SDHCI_TEGRA_VENDOR_SYS_SW_CTRL);
+
+ if (ios->enhanced_strobe)
+ val |= SDHCI_TEGRA_SYS_SW_CTRL_ENHANCED_STROBE;
+ else
+ val &= ~SDHCI_TEGRA_SYS_SW_CTRL_ENHANCED_STROBE;
+
+ sdhci_writel(host, val, SDHCI_TEGRA_VENDOR_SYS_SW_CTRL);
+
+}
+
static void tegra_sdhci_reset(struct sdhci_host *host, u8 mask)
{
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
@@ -950,6 +970,9 @@ static int sdhci_tegra_probe(struct platform_device *pdev)
sdhci_tegra_start_signal_voltage_switch;
}
+ host->mmc_host_ops.hs400_enhanced_strobe =
+ tegra_sdhci_hs400_enhanced_strobe;
+
rc = mmc_of_parse(host->mmc);
if (rc)
goto err_parse_dt;
--
2.7.4
next prev parent reply other threads:[~2018-08-10 18:14 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-10 18:13 [PATCH v2 0/8] Tegra SDHCI support HS400 on Tegra210 and Tegra186 Aapo Vienamo
2018-08-10 18:13 ` [PATCH v2 1/8] dt-bindings: mmc: Add DQS trim value to Tegra SDHCI Aapo Vienamo
2018-08-13 19:26 ` Rob Herring
2018-08-10 18:13 ` [PATCH v2 2/8] mmc: tegra: Parse and program DQS trim value Aapo Vienamo
2018-08-10 18:14 ` Aapo Vienamo [this message]
2018-08-10 18:14 ` [PATCH v2 4/8] mmc: tegra: Implement HS400 delay line calibration Aapo Vienamo
2018-08-10 18:14 ` [PATCH v2 5/8] arm64: dts: tegra186: Add SDMMC4 DQS trim value Aapo Vienamo
2018-08-10 18:14 ` [PATCH v2 6/8] arm64: dts: tegra210: " Aapo Vienamo
2018-08-10 18:14 ` [PATCH v2 7/8] arm64: dts: tegra186: Enable HS400 Aapo Vienamo
2018-08-10 18:14 ` [PATCH v2 8/8] arm64: dts: tegra210: " Aapo Vienamo
2018-08-24 9:11 ` [PATCH v2 0/8] Tegra SDHCI support HS400 on Tegra210 and Tegra186 Thierry Reding
2018-08-27 9:50 ` Ulf Hansson
2018-08-27 10:08 ` Thierry Reding
2018-08-27 10:26 ` Adrian Hunter
2018-08-27 11:47 ` Adrian Hunter
2018-08-31 14:02 ` Thierry Reding
2018-09-03 6:14 ` Ulf Hansson
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