From: Owen Chen <owen.chen@mediatek.com>
To: Rob Herring <robh@kernel.org>
Cc: Mars Cheng <mars.cheng@mediatek.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
Marc Zyngier <marc.zyngier@arm.com>,
Ryder Lee <ryder.lee@mediatek.com>,
Stephen Boyd <sboyd@kernel.org>,
Sean Wang <sean.wang@mediatek.com>,
CC Hwang <cc.hwang@mediatek.com>,
Loda Chou <loda.chou@mediatek.com>,
linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org,
devicetree@vger.kernel.org, wsd_upstream@mediatek.com,
linux-serial@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org
Subject: Re: [PATCH v5 01/11] dt-bindings: clock: mediatek: document clk bindings for Mediatek MT6765 SoC
Date: Mon, 13 Aug 2018 17:12:03 +0800 [thread overview]
Message-ID: <1534151523.17494.48.camel@mtkswgap22> (raw)
In-Reply-To: <20180720174331.GA26945@rob-hp-laptop>
On Fri, 2018-07-20 at 11:43 -0600, Rob Herring wrote:
> On Tue, Jul 17, 2018 at 04:52:22PM +0800, Mars Cheng wrote:
> > This patch adds the binding documentation for apmixedsys, audsys, camsys,
> > imgsys, infracfg, mipi0a, topckgen, vcodecsys
> >
> > Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
> > Signed-off-by: Owen Chen <owen.chen@mediatek.com>
> > ---
> > .../bindings/arm/mediatek/mediatek,apmixedsys.txt | 1 +
> > .../bindings/arm/mediatek/mediatek,audsys.txt | 1 +
> > .../bindings/arm/mediatek/mediatek,camsys.txt | 27 ++++++++++++++++++++
> > .../bindings/arm/mediatek/mediatek,imgsys.txt | 1 +
> > .../bindings/arm/mediatek/mediatek,infracfg.txt | 1 +
> > .../bindings/arm/mediatek/mediatek,mipi0a.txt | 23 +++++++++++++++++
> > .../bindings/arm/mediatek/mediatek,mmsys.txt | 1 +
> > .../bindings/arm/mediatek/mediatek,pericfg.txt | 1 +
> > .../bindings/arm/mediatek/mediatek,topckgen.txt | 1 +
> > .../bindings/arm/mediatek/mediatek,vcodecsys.txt | 22 ++++++++++++++++
> > 10 files changed, 79 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys.txt
> > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mipi0a.txt
> > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,vcodecsys.txt
> >
> > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt
> > index b404d59..44eaeac 100644
> > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt
> > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt
> > @@ -8,6 +8,7 @@ Required Properties:
> > - compatible: Should be one of:
> > - "mediatek,mt2701-apmixedsys"
> > - "mediatek,mt2712-apmixedsys", "syscon"
> > + - "mediatek,mt6765-apmixedsys", "syscon"
> > - "mediatek,mt6797-apmixedsys"
> > - "mediatek,mt7622-apmixedsys"
> > - "mediatek,mt8135-apmixedsys"
> > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt
> > index 34a69ba..9a8672a 100644
> > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt
> > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt
> > @@ -7,6 +7,7 @@ Required Properties:
> >
> > - compatible: Should be one of:
> > - "mediatek,mt2701-audsys", "syscon"
> > + - "mediatek,mt6765-audsys", "syscon"
> > - "mediatek,mt7622-audsys", "syscon"
> > - #clock-cells: Must be 1
> >
> > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys.txt
> > new file mode 100644
> > index 0000000..dc75783
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys.txt
> > @@ -0,0 +1,27 @@
> > +MediaTek CAMSYS controller
> > +============================
> > +
> > +The MediaTek CAMSYS controller provides various clocks to the system.
>
> Only clocks? If so, then this should be moved to bindings/clocks/.
>
camsys conclude not only clks but also mtcmos, so it's better to put
this node in this path.
> > +
> > +Required Properties:
> > +
> > +- compatible: Should be one of:
> > + - "mediatek,mt6765-camsys", "syscon"
> > +- #clock-cells: Must be 1
> > +
> > +The AUDSYS controller uses the common clk binding from
> > +Documentation/devicetree/bindings/clock/clock-bindings.txt
> > +The available clocks are defined in dt-bindings/clock/mt*-clk.h.
> > +
> > +Required sub-nodes:
> > +-------
> > +For common binding part and usage, refer to
> > +../sonud/mt2701-afe-pcm.txt.
> > +
> > +Example:
> > +
> > +camsys: camsys@1a000000 {
>
> clock-controller@...
>
> if the above answer is yes.
>
> Same comments on the other docs.
next prev parent reply other threads:[~2018-08-13 9:12 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-17 8:52 [PATCH v5 0/11] Add basic SoC support for mt6765 Mars Cheng
2018-07-17 8:52 ` [PATCH v5 01/11] dt-bindings: clock: mediatek: document clk bindings for Mediatek MT6765 SoC Mars Cheng
2018-07-20 17:43 ` Rob Herring
2018-08-13 9:12 ` Owen Chen [this message]
2018-07-17 8:52 ` [PATCH v5 02/11] dt-bindings: mediatek: Add smi dts binding " Mars Cheng
2018-07-20 17:44 ` Rob Herring
2018-07-17 8:52 ` [PATCH v5 03/11] dt-bindings: mediatek: add MT6765 power dt-bindings Mars Cheng
2018-07-20 17:45 ` Rob Herring
2018-07-17 8:52 ` [PATCH v5 04/11] soc: mediatek: add MT6765 scpsys support Mars Cheng
2018-07-17 13:00 ` Sean Wang
2018-07-18 8:54 ` Mars Cheng
2018-07-20 17:46 ` Rob Herring
2018-07-17 8:52 ` [PATCH v5 05/11] clk: mediatek: add mt6765 clock IDs Mars Cheng
2018-07-17 10:24 ` Matthias Brugger
2018-07-18 4:23 ` Mars Cheng
2018-07-17 8:52 ` [PATCH v5 06/11] soc: mediatek: add new flow for mtcmos power Mars Cheng
2018-07-17 15:49 ` kbuild test robot
2018-07-17 18:19 ` kbuild test robot
2018-07-17 18:19 ` [RFC PATCH] soc: mediatek: bus_ctrl_set_release() can be static kbuild test robot
2018-07-17 20:36 ` [PATCH v5 06/11] soc: mediatek: add new flow for mtcmos power kbuild test robot
2018-07-18 14:50 ` Matthias Brugger
2018-07-25 9:42 ` Owen Chen
[not found] ` <1531817552-17221-1-git-send-email-mars.cheng-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
2018-07-17 8:52 ` [PATCH v5 07/11] soc: mediatek: add MT6765 subdomain support Mars Cheng
[not found] ` <ce7724590f4e4551be88b76a7355738c@MTKMBS31N1.mediatek.inc>
2018-07-25 9:07 ` Yong Wu
2018-07-17 8:52 ` [PATCH v5 08/11] clk: mediatek: fix pll setting Mars Cheng
2018-07-17 8:52 ` [PATCH v5 09/11] clk: mediatek: add new clkmux register API Mars Cheng
2018-07-19 6:57 ` Sean Wang
2018-08-13 9:09 ` Owen Chen
2018-07-17 8:52 ` [PATCH v5 10/11] clk: mediatek: Add MT6765 clock support Mars Cheng
2018-07-17 16:09 ` kbuild test robot
2018-07-17 18:52 ` kbuild test robot
2018-07-17 18:52 ` [RFC PATCH] clk: mediatek: cksys_base can be static kbuild test robot
2018-07-17 8:52 ` [PATCH v5 11/11] arm64: dts: mediatek: add mt6765 support Mars Cheng
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