From: Jolly Shah <jolly.shah@xilinx.com>
To: matthias.bgg@gmail.com, andy.gross@linaro.org,
shawnguo@kernel.org, geert+renesas@glider.be,
bjorn.andersson@linaro.org, sean.wang@mediatek.com,
m.szyprowski@samsung.com, michal.simek@xilinx.com,
robh+dt@kernel.org, mark.rutland@arm.com
Cc: rajanv@xilinx.com, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Rajan Vaja <rajan.vaja@xilinx.com>,
Jolly Shah <jollys@xilinx.com>
Subject: [PATCH v2 1/3] dt-bindings: power: Add ZynqMP power domain bindings
Date: Thu, 16 Aug 2018 12:21:42 -0700 [thread overview]
Message-ID: <1534447304-12919-2-git-send-email-jollys@xilinx.com> (raw)
In-Reply-To: <1534447304-12919-1-git-send-email-jollys@xilinx.com>
From: Rajan Vaja <rajan.vaja@xilinx.com>
Add documentation to describe ZynqMP power domain bindings.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
---
.../firmware/xilinx/xlnx,zynqmp-firmware.txt | 47 ++++++++++++++++++++++
1 file changed, 47 insertions(+)
diff --git a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.txt b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.txt
index d215d15..5fa10a0 100644
--- a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.txt
+++ b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.txt
@@ -64,6 +64,29 @@ Output clocks are registered based on clock information received
from firmware. Output clocks indexes are mentioned in
include/dt-bindings/clock/xlnx,zynqmp-clk.h.
+-----------------------------------------------------------
+Device Tree Bindings for the Xilinx Zynq MPSoC PM domains
+-----------------------------------------------------------
+The binding for zynqmp-power-controller follow the common
+generic PM domain binding[1].
+
+[1] Documentation/devicetree/bindings/power/power_domain.txt
+
+== Zynq MPSoC Generic PM Domain Node ==
+
+Required properties:
+ - compatible: Must be: "xlnx,zynqmp-power-controller"
+
+This node contains a number of subnodes, each representing a single PM domain
+that PM domain consumer devices reference.
+
+== PM Domain Nodes ==
+
+Required properties:
+ - #power-domain-cells: Number of cells in a PM domain specifier. Must be 0.
+ - pd-id: Domain identifier as defined by platform firmware.
+ This identifier is passed to the PM firmware.
+
-------
Example
-------
@@ -78,5 +101,29 @@ firmware {
clocks = <&pss_ref_clk>, <&video_clk>, <&pss_alt_ref_clk>, <&aux_ref_clk>, <>_crx_ref_clk>;
clock-names = "pss_ref_clk", "video_clk", "pss_alt_ref_clk","aux_ref_clk", "gt_crx_ref_clk";
};
+ zynqmp-power-controller {
+ compatible = "xlnx,zynqmp-power-controller";
+
+ pd_usb0: pd-usb0 {
+ pd-id = <22>;
+ #power-domain-cells = <0>;
+ };
+
+ pd_sata: pd-sata {
+ pd-id = <28>;
+ #power-domain-cells = <0>;
+ };
+
+ pd_gpu : pd-gpu {
+ pd-id = <58 20 21>;
+ #power-domain-cells = <0>;
+ };
+ };
};
};
+
+sata0: ahci@SATA_AHCI_HBA {
+ ...
+ power-domains = <&pd_sata>;
+ ...
+};
--
2.7.4
next prev parent reply other threads:[~2018-08-16 19:21 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-16 19:21 [PATCH v2 0/3] drivers: soc: xilinx: Add support for ZynqMP power domain driver Jolly Shah
2018-08-16 19:21 ` Jolly Shah [this message]
2018-08-20 19:46 ` [PATCH v2 1/3] dt-bindings: power: Add ZynqMP power domain bindings Rob Herring
2018-08-24 22:22 ` Jolly Shah
2018-09-13 17:51 ` Jolly Shah
2018-09-25 16:15 ` Rob Herring
2018-10-04 21:26 ` Jolly Shah
2018-08-16 19:21 ` [PATCH v2 2/3] firmware: xilinx: Add APIs to control node status/power Jolly Shah
2018-08-16 19:21 ` [PATCH v2 3/3] drivers: soc: xilinx: Add ZynqMP power domain driver Jolly Shah
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