* [PATCH 1/3] dt-bindings: pwrap: mediatek: add pwrap support for MT6765
2018-09-04 12:31 [PATCH 0/3] Pwrap: Mediatek pwrap driver for mt6765 Argus Lin
@ 2018-09-04 12:31 ` Argus Lin
2018-09-25 15:37 ` Matthias Brugger
2018-09-04 12:31 ` [PATCH 2/3] soc: mediatek: pwrap: add pwrap driver for mt6765 SoCs Argus Lin
2018-09-04 12:31 ` [PATCH 3/3] soc: mediatek: pwrap: add mt6357 " Argus Lin
2 siblings, 1 reply; 7+ messages in thread
From: Argus Lin @ 2018-09-04 12:31 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Matthias Brugger, Catalin Marinas,
Will Deacon
Cc: devicetree, argus.lin, wsd_upstream, Chenglin Xu, Sean Wang,
linux-kernel, henryc.chen, flora.fu, Christophe Jaillet,
linux-arm-kernel, linux-mediatek, Chen Zhong, shailendra.v
Add binding document of pwrap for MT6765 SoCs.
Signed-off-by: Argus Lin <argus.lin@mediatek.com>
---
Documentation/devicetree/bindings/soc/mediatek/pwrap.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
index f9987c3..359d64f 100644
--- a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
+++ b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
@@ -19,6 +19,7 @@ IP Pairing
Required properties in pwrap device node.
- compatible:
"mediatek,mt2701-pwrap" for MT2701/7623 SoCs
+ "mediatek,mt6765-pwrap" for MT6765 SoCs
"mediatek,mt6797-pwrap" for MT6797 SoCs
"mediatek,mt7622-pwrap" for MT7622 SoCs
"mediatek,mt8135-pwrap" for MT8135 SoCs
--
1.8.1.1.dirty
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 1/3] dt-bindings: pwrap: mediatek: add pwrap support for MT6765
2018-09-04 12:31 ` [PATCH 1/3] dt-bindings: pwrap: mediatek: add pwrap support for MT6765 Argus Lin
@ 2018-09-25 15:37 ` Matthias Brugger
0 siblings, 0 replies; 7+ messages in thread
From: Matthias Brugger @ 2018-09-25 15:37 UTC (permalink / raw)
To: Argus Lin, Rob Herring, Mark Rutland, Catalin Marinas,
Will Deacon
Cc: Chenglin Xu, Sean Wang, wsd_upstream, henryc.chen, flora.fu,
Chen Zhong, Christophe Jaillet, shailendra.v, devicetree,
linux-kernel, linux-arm-kernel, linux-mediatek
On 04/09/2018 14:31, Argus Lin wrote:
> Add binding document of pwrap for MT6765 SoCs.
>
> Signed-off-by: Argus Lin <argus.lin@mediatek.com>
> ---
Applied to v4.19-next/soc
> Documentation/devicetree/bindings/soc/mediatek/pwrap.txt | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
> index f9987c3..359d64f 100644
> --- a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
> +++ b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
> @@ -19,6 +19,7 @@ IP Pairing
> Required properties in pwrap device node.
> - compatible:
> "mediatek,mt2701-pwrap" for MT2701/7623 SoCs
> + "mediatek,mt6765-pwrap" for MT6765 SoCs
> "mediatek,mt6797-pwrap" for MT6797 SoCs
> "mediatek,mt7622-pwrap" for MT7622 SoCs
> "mediatek,mt8135-pwrap" for MT8135 SoCs
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 2/3] soc: mediatek: pwrap: add pwrap driver for mt6765 SoCs
2018-09-04 12:31 [PATCH 0/3] Pwrap: Mediatek pwrap driver for mt6765 Argus Lin
2018-09-04 12:31 ` [PATCH 1/3] dt-bindings: pwrap: mediatek: add pwrap support for MT6765 Argus Lin
@ 2018-09-04 12:31 ` Argus Lin
2018-09-25 15:38 ` Matthias Brugger
2018-09-04 12:31 ` [PATCH 3/3] soc: mediatek: pwrap: add mt6357 " Argus Lin
2 siblings, 1 reply; 7+ messages in thread
From: Argus Lin @ 2018-09-04 12:31 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Matthias Brugger, Catalin Marinas,
Will Deacon
Cc: devicetree, argus.lin, wsd_upstream, Chenglin Xu, Sean Wang,
linux-kernel, henryc.chen, flora.fu, Christophe Jaillet,
linux-arm-kernel, linux-mediatek, Chen Zhong, shailendra.v
mt6765 is a highly integrated SoCs, it uses mt6357 for power management.
This patch adds pwrap driver to access mt6357. Pwrap of mt6765 support
dynamic priority meichanism, sequence monitor and starvation mechanism
to make transaction more reliable.
Signed-off-by: Argus Lin <argus.lin@mediatek.com>
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 49 ++++++++++++++++++++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 4e931fd..ddaeace 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -381,6 +381,38 @@ enum pwrap_regs {
[PWRAP_ADC_RDATA_ADDR2] = 0x154,
};
+static int mt6765_regs[] = {
+ [PWRAP_MUX_SEL] = 0x0,
+ [PWRAP_WRAP_EN] = 0x4,
+ [PWRAP_DIO_EN] = 0x8,
+ [PWRAP_RDDMY] = 0x20,
+ [PWRAP_CSHEXT_WRITE] = 0x24,
+ [PWRAP_CSHEXT_READ] = 0x28,
+ [PWRAP_CSLEXT_START] = 0x2C,
+ [PWRAP_CSLEXT_END] = 0x30,
+ [PWRAP_STAUPD_PRD] = 0x3C,
+ [PWRAP_HARB_HPRIO] = 0x68,
+ [PWRAP_HIPRIO_ARB_EN] = 0x6C,
+ [PWRAP_MAN_EN] = 0x7C,
+ [PWRAP_MAN_CMD] = 0x80,
+ [PWRAP_WACS0_EN] = 0x8C,
+ [PWRAP_WACS1_EN] = 0x94,
+ [PWRAP_WACS2_EN] = 0x9C,
+ [PWRAP_INIT_DONE2] = 0xA0,
+ [PWRAP_WACS2_CMD] = 0xC20,
+ [PWRAP_WACS2_RDATA] = 0xC24,
+ [PWRAP_WACS2_VLDCLR] = 0xC28,
+ [PWRAP_INT_EN] = 0xB4,
+ [PWRAP_INT_FLG_RAW] = 0xB8,
+ [PWRAP_INT_FLG] = 0xBC,
+ [PWRAP_INT_CLR] = 0xC0,
+ [PWRAP_TIMER_EN] = 0xE8,
+ [PWRAP_WDT_UNIT] = 0xF0,
+ [PWRAP_WDT_SRC_EN] = 0xF4,
+ [PWRAP_DCM_EN] = 0x1DC,
+ [PWRAP_DCM_DBC_PRD] = 0x1E0,
+};
+
static int mt6797_regs[] = {
[PWRAP_MUX_SEL] = 0x0,
[PWRAP_WRAP_EN] = 0x4,
@@ -690,6 +722,7 @@ enum pmic_type {
enum pwrap_type {
PWRAP_MT2701,
+ PWRAP_MT6765,
PWRAP_MT6797,
PWRAP_MT7622,
PWRAP_MT8135,
@@ -1117,6 +1150,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
pwrap_writel(wrp, 1, PWRAP_CIPHER_START);
break;
case PWRAP_MT2701:
+ case PWRAP_MT6765:
case PWRAP_MT6797:
case PWRAP_MT8173:
pwrap_writel(wrp, 1, PWRAP_CIPHER_EN);
@@ -1460,6 +1494,18 @@ static irqreturn_t pwrap_interrupt(int irqno, void *dev_id)
.init_soc_specific = pwrap_mt2701_init_soc_specific,
};
+static const struct pmic_wrapper_type pwrap_mt6765 = {
+ .regs = mt6765_regs,
+ .type = PWRAP_MT6765,
+ .arb_en_all = 0x3fd35,
+ .int_en_all = 0xffffffff,
+ .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
+ .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
+ .has_bridge = 0,
+ .init_reg_clock = pwrap_common_init_reg_clock,
+ .init_soc_specific = NULL,
+};
+
static const struct pmic_wrapper_type pwrap_mt6797 = {
.regs = mt6797_regs,
.type = PWRAP_MT6797,
@@ -1513,6 +1559,9 @@ static irqreturn_t pwrap_interrupt(int irqno, void *dev_id)
.compatible = "mediatek,mt2701-pwrap",
.data = &pwrap_mt2701,
}, {
+ .compatible = "mediatek,mt6765-pwrap",
+ .data = &pwrap_mt6765,
+ }, {
.compatible = "mediatek,mt6797-pwrap",
.data = &pwrap_mt6797,
}, {
--
1.8.1.1.dirty
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH 2/3] soc: mediatek: pwrap: add pwrap driver for mt6765 SoCs
2018-09-04 12:31 ` [PATCH 2/3] soc: mediatek: pwrap: add pwrap driver for mt6765 SoCs Argus Lin
@ 2018-09-25 15:38 ` Matthias Brugger
0 siblings, 0 replies; 7+ messages in thread
From: Matthias Brugger @ 2018-09-25 15:38 UTC (permalink / raw)
To: Argus Lin, Rob Herring, Mark Rutland, Catalin Marinas,
Will Deacon
Cc: Chenglin Xu, Sean Wang, wsd_upstream, henryc.chen, flora.fu,
Chen Zhong, Christophe Jaillet, shailendra.v, devicetree,
linux-kernel, linux-arm-kernel, linux-mediatek
On 04/09/2018 14:31, Argus Lin wrote:
> mt6765 is a highly integrated SoCs, it uses mt6357 for power management.
> This patch adds pwrap driver to access mt6357. Pwrap of mt6765 support
> dynamic priority meichanism, sequence monitor and starvation mechanism
> to make transaction more reliable.
>
> Signed-off-by: Argus Lin <argus.lin@mediatek.com>
I fixed the has_bridge variable, as this is obsolete now.
Please check that I didn't do an error.
Applied to v4.19-next/soc
> ---
> drivers/soc/mediatek/mtk-pmic-wrap.c | 49 ++++++++++++++++++++++++++++++++++++
> 1 file changed, 49 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index 4e931fd..ddaeace 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -381,6 +381,38 @@ enum pwrap_regs {
> [PWRAP_ADC_RDATA_ADDR2] = 0x154,
> };
>
> +static int mt6765_regs[] = {
> + [PWRAP_MUX_SEL] = 0x0,
> + [PWRAP_WRAP_EN] = 0x4,
> + [PWRAP_DIO_EN] = 0x8,
> + [PWRAP_RDDMY] = 0x20,
> + [PWRAP_CSHEXT_WRITE] = 0x24,
> + [PWRAP_CSHEXT_READ] = 0x28,
> + [PWRAP_CSLEXT_START] = 0x2C,
> + [PWRAP_CSLEXT_END] = 0x30,
> + [PWRAP_STAUPD_PRD] = 0x3C,
> + [PWRAP_HARB_HPRIO] = 0x68,
> + [PWRAP_HIPRIO_ARB_EN] = 0x6C,
> + [PWRAP_MAN_EN] = 0x7C,
> + [PWRAP_MAN_CMD] = 0x80,
> + [PWRAP_WACS0_EN] = 0x8C,
> + [PWRAP_WACS1_EN] = 0x94,
> + [PWRAP_WACS2_EN] = 0x9C,
> + [PWRAP_INIT_DONE2] = 0xA0,
> + [PWRAP_WACS2_CMD] = 0xC20,
> + [PWRAP_WACS2_RDATA] = 0xC24,
> + [PWRAP_WACS2_VLDCLR] = 0xC28,
> + [PWRAP_INT_EN] = 0xB4,
> + [PWRAP_INT_FLG_RAW] = 0xB8,
> + [PWRAP_INT_FLG] = 0xBC,
> + [PWRAP_INT_CLR] = 0xC0,
> + [PWRAP_TIMER_EN] = 0xE8,
> + [PWRAP_WDT_UNIT] = 0xF0,
> + [PWRAP_WDT_SRC_EN] = 0xF4,
> + [PWRAP_DCM_EN] = 0x1DC,
> + [PWRAP_DCM_DBC_PRD] = 0x1E0,
> +};
> +
> static int mt6797_regs[] = {
> [PWRAP_MUX_SEL] = 0x0,
> [PWRAP_WRAP_EN] = 0x4,
> @@ -690,6 +722,7 @@ enum pmic_type {
>
> enum pwrap_type {
> PWRAP_MT2701,
> + PWRAP_MT6765,
> PWRAP_MT6797,
> PWRAP_MT7622,
> PWRAP_MT8135,
> @@ -1117,6 +1150,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
> pwrap_writel(wrp, 1, PWRAP_CIPHER_START);
> break;
> case PWRAP_MT2701:
> + case PWRAP_MT6765:
> case PWRAP_MT6797:
> case PWRAP_MT8173:
> pwrap_writel(wrp, 1, PWRAP_CIPHER_EN);
> @@ -1460,6 +1494,18 @@ static irqreturn_t pwrap_interrupt(int irqno, void *dev_id)
> .init_soc_specific = pwrap_mt2701_init_soc_specific,
> };
>
> +static const struct pmic_wrapper_type pwrap_mt6765 = {
> + .regs = mt6765_regs,
> + .type = PWRAP_MT6765,
> + .arb_en_all = 0x3fd35,
> + .int_en_all = 0xffffffff,
> + .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
> + .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
> + .has_bridge = 0,
> + .init_reg_clock = pwrap_common_init_reg_clock,
> + .init_soc_specific = NULL,
> +};
> +
> static const struct pmic_wrapper_type pwrap_mt6797 = {
> .regs = mt6797_regs,
> .type = PWRAP_MT6797,
> @@ -1513,6 +1559,9 @@ static irqreturn_t pwrap_interrupt(int irqno, void *dev_id)
> .compatible = "mediatek,mt2701-pwrap",
> .data = &pwrap_mt2701,
> }, {
> + .compatible = "mediatek,mt6765-pwrap",
> + .data = &pwrap_mt6765,
> + }, {
> .compatible = "mediatek,mt6797-pwrap",
> .data = &pwrap_mt6797,
> }, {
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 3/3] soc: mediatek: pwrap: add mt6357 driver for mt6765 SoCs
2018-09-04 12:31 [PATCH 0/3] Pwrap: Mediatek pwrap driver for mt6765 Argus Lin
2018-09-04 12:31 ` [PATCH 1/3] dt-bindings: pwrap: mediatek: add pwrap support for MT6765 Argus Lin
2018-09-04 12:31 ` [PATCH 2/3] soc: mediatek: pwrap: add pwrap driver for mt6765 SoCs Argus Lin
@ 2018-09-04 12:31 ` Argus Lin
2018-09-25 15:39 ` Matthias Brugger
2 siblings, 1 reply; 7+ messages in thread
From: Argus Lin @ 2018-09-04 12:31 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Matthias Brugger, Catalin Marinas,
Will Deacon
Cc: devicetree, argus.lin, wsd_upstream, Chenglin Xu, Sean Wang,
linux-kernel, henryc.chen, flora.fu, Christophe Jaillet,
linux-arm-kernel, linux-mediatek, Chen Zhong, shailendra.v
MT6357 is a new power management IC and it is used for mt6765 SoCs.
To define mt6357_regs for pmic register mapping and pmic_mt6357
for accessing register.
Signed-off-by: Argus Lin <argus.lin@mediatek.com>
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 35 ++++++++++++++++++++++++++++++++---
1 file changed, 32 insertions(+), 3 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index ddaeace..2b2cee1 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -161,6 +161,21 @@ enum dew_regs {
[PWRAP_DEW_RDDMY_NO] = 0x030C,
};
+static const u32 mt6357_regs[] = {
+ [PWRAP_DEW_DIO_EN] = 0x040A,
+ [PWRAP_DEW_READ_TEST] = 0x040C,
+ [PWRAP_DEW_WRITE_TEST] = 0x040E,
+ [PWRAP_DEW_CRC_EN] = 0x0412,
+ [PWRAP_DEW_CRC_VAL] = 0x0414,
+ [PWRAP_DEW_CIPHER_KEY_SEL] = 0x0418,
+ [PWRAP_DEW_CIPHER_IV_SEL] = 0x041A,
+ [PWRAP_DEW_CIPHER_EN] = 0x041C,
+ [PWRAP_DEW_CIPHER_RDY] = 0x041E,
+ [PWRAP_DEW_CIPHER_MODE] = 0x0420,
+ [PWRAP_DEW_CIPHER_SWRST] = 0x0422,
+ [PWRAP_DEW_RDDMY_NO] = 0x0424,
+};
+
enum pwrap_regs {
PWRAP_MUX_SEL,
PWRAP_WRAP_EN,
@@ -716,6 +731,7 @@ enum pwrap_regs {
enum pmic_type {
PMIC_MT6323,
PMIC_MT6351,
+ PMIC_MT6357,
PMIC_MT6380,
PMIC_MT6397,
};
@@ -1175,6 +1191,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
break;
case PMIC_MT6323:
case PMIC_MT6351:
+ case PMIC_MT6357:
pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_EN],
0x1);
break;
@@ -1460,11 +1477,26 @@ static irqreturn_t pwrap_interrupt(int irqno, void *dev_id)
.pwrap_write = pwrap_write16,
};
+static const struct pwrap_slv_type pmic_mt6357 = {
+ .dew_regs = mt6357_regs,
+ .type = PMIC_MT6357,
+ .regmap = &pwrap_regmap_config16,
+ .caps = 0,
+ .pwrap_read = pwrap_read16,
+ .pwrap_write = pwrap_write16,
+};
+
static const struct of_device_id of_slave_match_tbl[] = {
{
.compatible = "mediatek,mt6323",
.data = &pmic_mt6323,
}, {
+ .compatible = "mediatek,mt6351",
+ .data = &pmic_mt6351,
+ }, {
+ .compatible = "mediatek,mt6357",
+ .data = &pmic_mt6357,
+ }, {
/* The MT6380 PMIC only implements a regulator, so we bind it
* directly instead of using a MFD.
*/
@@ -1474,9 +1506,6 @@ static irqreturn_t pwrap_interrupt(int irqno, void *dev_id)
.compatible = "mediatek,mt6397",
.data = &pmic_mt6397,
}, {
- .compatible = "mediatek,mt6351",
- .data = &pmic_mt6351,
- }, {
/* sentinel */
}
};
--
1.8.1.1.dirty
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH 3/3] soc: mediatek: pwrap: add mt6357 driver for mt6765 SoCs
2018-09-04 12:31 ` [PATCH 3/3] soc: mediatek: pwrap: add mt6357 " Argus Lin
@ 2018-09-25 15:39 ` Matthias Brugger
0 siblings, 0 replies; 7+ messages in thread
From: Matthias Brugger @ 2018-09-25 15:39 UTC (permalink / raw)
To: Argus Lin, Rob Herring, Mark Rutland, Catalin Marinas,
Will Deacon
Cc: Chenglin Xu, Sean Wang, wsd_upstream, henryc.chen, flora.fu,
Chen Zhong, Christophe Jaillet, shailendra.v, devicetree,
linux-kernel, linux-arm-kernel, linux-mediatek
On 04/09/2018 14:31, Argus Lin wrote:
> MT6357 is a new power management IC and it is used for mt6765 SoCs.
> To define mt6357_regs for pmic register mapping and pmic_mt6357
> for accessing register.
>
> Signed-off-by: Argus Lin <argus.lin@mediatek.com>
Needed some handwork to get it applied, please check that no bug slipped in.
Applied to v4.19-ext/soc
Thanks a lot.
> ---
> drivers/soc/mediatek/mtk-pmic-wrap.c | 35 ++++++++++++++++++++++++++++++++---
> 1 file changed, 32 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index ddaeace..2b2cee1 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -161,6 +161,21 @@ enum dew_regs {
> [PWRAP_DEW_RDDMY_NO] = 0x030C,
> };
>
> +static const u32 mt6357_regs[] = {
> + [PWRAP_DEW_DIO_EN] = 0x040A,
> + [PWRAP_DEW_READ_TEST] = 0x040C,
> + [PWRAP_DEW_WRITE_TEST] = 0x040E,
> + [PWRAP_DEW_CRC_EN] = 0x0412,
> + [PWRAP_DEW_CRC_VAL] = 0x0414,
> + [PWRAP_DEW_CIPHER_KEY_SEL] = 0x0418,
> + [PWRAP_DEW_CIPHER_IV_SEL] = 0x041A,
> + [PWRAP_DEW_CIPHER_EN] = 0x041C,
> + [PWRAP_DEW_CIPHER_RDY] = 0x041E,
> + [PWRAP_DEW_CIPHER_MODE] = 0x0420,
> + [PWRAP_DEW_CIPHER_SWRST] = 0x0422,
> + [PWRAP_DEW_RDDMY_NO] = 0x0424,
> +};
> +
> enum pwrap_regs {
> PWRAP_MUX_SEL,
> PWRAP_WRAP_EN,
> @@ -716,6 +731,7 @@ enum pwrap_regs {
> enum pmic_type {
> PMIC_MT6323,
> PMIC_MT6351,
> + PMIC_MT6357,
> PMIC_MT6380,
> PMIC_MT6397,
> };
> @@ -1175,6 +1191,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
> break;
> case PMIC_MT6323:
> case PMIC_MT6351:
> + case PMIC_MT6357:
> pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_EN],
> 0x1);
> break;
> @@ -1460,11 +1477,26 @@ static irqreturn_t pwrap_interrupt(int irqno, void *dev_id)
> .pwrap_write = pwrap_write16,
> };
>
> +static const struct pwrap_slv_type pmic_mt6357 = {
> + .dew_regs = mt6357_regs,
> + .type = PMIC_MT6357,
> + .regmap = &pwrap_regmap_config16,
> + .caps = 0,
> + .pwrap_read = pwrap_read16,
> + .pwrap_write = pwrap_write16,
> +};
> +
> static const struct of_device_id of_slave_match_tbl[] = {
> {
> .compatible = "mediatek,mt6323",
> .data = &pmic_mt6323,
> }, {
> + .compatible = "mediatek,mt6351",
> + .data = &pmic_mt6351,
> + }, {
> + .compatible = "mediatek,mt6357",
> + .data = &pmic_mt6357,
> + }, {
> /* The MT6380 PMIC only implements a regulator, so we bind it
> * directly instead of using a MFD.
> */
> @@ -1474,9 +1506,6 @@ static irqreturn_t pwrap_interrupt(int irqno, void *dev_id)
> .compatible = "mediatek,mt6397",
> .data = &pmic_mt6397,
> }, {
> - .compatible = "mediatek,mt6351",
> - .data = &pmic_mt6351,
> - }, {
> /* sentinel */
> }
> };
>
^ permalink raw reply [flat|nested] 7+ messages in thread