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From: <honghui.zhang@mediatek.com>
To: lorenzo.pieralisi@arm.com, bhelgaas@google.com,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org, ryder.lee@mediatek.com
Cc: ulf.hansson@linaro.org, marc.zyngier@arm.com,
	matthias.bgg@gmail.com, devicetree@vger.kernel.org,
	yingjoe.chen@mediatek.com, eddie.huang@mediatek.com,
	honghui.zhang@mediatek.com, youlin.pei@mediatek.com,
	yt.shen@mediatek.com, sean.wang@mediatek.com
Subject: [PATCH v5 6/9] PCI: mediatek: Enable msi after clock enabled
Date: Fri, 28 Sep 2018 18:04:37 +0800	[thread overview]
Message-ID: <1538129080-8206-7-git-send-email-honghui.zhang@mediatek.com> (raw)
In-Reply-To: <1538129080-8206-1-git-send-email-honghui.zhang@mediatek.com>

From: Honghui Zhang <honghui.zhang@mediatek.com>

The clocks was not enabled when enable MSI. This patch fix this
issue by calling mtk_pcie_enable_msi in mtk_pcie_startup_port_v2
since the clock was all enabled at that time.

Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com>
---
 drivers/pci/controller/pcie-mediatek.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c
index d150be1..be38b38 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -572,8 +572,6 @@ static int mtk_pcie_init_irq_domain(struct mtk_pcie_port *port,
 		ret = mtk_pcie_allocate_msi_domains(port);
 		if (ret)
 			return ret;
-
-		mtk_pcie_enable_msi(port);
 	}
 
 	return 0;
@@ -694,6 +692,9 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port)
 	val &= ~INTX_MASK;
 	writel(val, port->base + PCIE_INT_MASK);
 
+	if (IS_ENABLED(CONFIG_PCI_MSI))
+		mtk_pcie_enable_msi(port);
+
 	/* Set AHB to PCIe translation windows */
 	size = mem->end - mem->start;
 	val = lower_32_bits(mem->start) | AHB2PCIE_SIZE(fls(size));
-- 
2.6.4

  parent reply	other threads:[~2018-09-28 10:04 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-28 10:04 [PATCH v5 0/9] PCI: mediatek: fixup find_port, enable_msi and add pm, module support honghui.zhang
2018-09-28 10:04 ` [PATCH v5 1/9] PCI: mediatek: Using slot's devfn for compare to fix mtk_pcie_find_port logic honghui.zhang
2018-10-01 14:36   ` Lorenzo Pieralisi
2018-10-02 10:59     ` Lorenzo Pieralisi
     [not found]       ` <20181002105945.GA27736-4tUPXFaYRHv6sAKXYmQ0tx/iLCjYCKR+VpNB7YpNyf8@public.gmane.org>
2018-10-08  3:02         ` Honghui Zhang
2018-09-28 10:04 ` [PATCH v5 2/9] PCI: mediatek: Fixup class ID for MT7622 as PCI_CLASS_BRIDGE_PCI honghui.zhang
2018-09-28 10:04 ` [PATCH v5 3/9] PCI: mediatek: Remove the redundant dev->pm_domain check honghui.zhang
2018-09-28 10:04 ` [PATCH v5 4/9] PCI: mediatek: Convert to use pci_host_probe() honghui.zhang
2018-09-28 15:41   ` Ryder Lee
2018-09-29  0:16     ` Honghui Zhang
2018-09-29  5:55       ` Ryder Lee
2018-09-28 10:04 ` [PATCH v5 5/9] PCI: mediatek: Move the mtk_pcie_startup_port_v2 function's define after mtk_pcie_setup_irq honghui.zhang
2018-09-28 10:04 ` honghui.zhang [this message]
2018-10-02 11:01   ` [PATCH v5 6/9] PCI: mediatek: Enable msi after clock enabled Lorenzo Pieralisi
2018-09-28 10:04 ` [PATCH v5 7/9] PCI: mediatek: Add system pm support for MT2712 and MT7622 honghui.zhang
2018-09-28 10:04 ` [PATCH v5 8/9] PCI: mediatek: Save the GIC IRQ in mtk_pcie_port honghui.zhang
2018-09-28 10:04 ` [PATCH v5 9/9] PCI: mediatek: Add loadable kernel module support honghui.zhang
2018-09-29  5:58 ` [PATCH v5 0/9] PCI: mediatek: fixup find_port, enable_msi and add pm, " Ryder Lee

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