From mboxrd@z Thu Jan 1 00:00:00 1970 From: Pierre-Yves MORDRET Subject: [PATCH v3 2/7] dt-bindings: stm32-dmamux: Add one cell to support DMA/MDMA chain Date: Fri, 28 Sep 2018 15:01:50 +0200 Message-ID: <1538139715-24406-3-git-send-email-pierre-yves.mordret@st.com> References: <1538139715-24406-1-git-send-email-pierre-yves.mordret@st.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1538139715-24406-1-git-send-email-pierre-yves.mordret@st.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Vinod Koul , Rob Herring , Mark Rutland , Alexandre Torgue , Maxime Coquelin , Dan Williams , devicetree@vger.kernel.org, dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Pierre-Yves MORDRET List-Id: devicetree@vger.kernel.org From: M'boumba Cedric Madianga Add one cell to support DMA/MDMA chaining. Signed-off-by: Pierre-Yves MORDRET --- Version history: v3: v2: * rework content v1: * Initial --- --- Documentation/devicetree/bindings/dma/stm32-dmamux.txt | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/stm32-dmamux.txt b/Documentation/devicetree/bindings/dma/stm32-dmamux.txt index 1b893b2..5e92b59 100644 --- a/Documentation/devicetree/bindings/dma/stm32-dmamux.txt +++ b/Documentation/devicetree/bindings/dma/stm32-dmamux.txt @@ -4,9 +4,9 @@ Required properties: - compatible: "st,stm32h7-dmamux" - reg: Memory map for accessing module - #dma-cells: Should be set to <3>. - First parameter is request line number. - Second is DMA channel configuration - Third is Fifo threshold +- First parameter is request line number. +- Second is DMA channel configuration +- Third is a 32bit bitfield For more details about the three cells, please see stm32-dma.txt documentation binding file - dma-masters: Phandle pointing to the DMA controllers. -- 2.7.4