Re: [PATCH v4 3/5] mmc: dw_mmc-rockchip: Fix runtime PM support for internal phase support

["Heiko Stübner" <heiko@sntech.de>]

Am Freitag, 16. Januar 2026, 01:55:30 Mitteleuropäische Normalzeit schrieb Shawn Lin:
> RK3576 is the first platform to introduce internal phase support, and
> subsequent platforms are expected to adopt a similar design. In this
> architecture, runtime suspend powers off the attached power domain, which
> resets registers, including vendor-specific ones such as SDMMC_TIMING_CON0,
> SDMMC_TIMING_CON1, and SDMMC_MISC_CON. These registers must be saved and
> restored, a requirement that falls outside the scope of the dw_mmc core.
> 
> Fixes: 59903441f5e4 ("mmc: dw_mmc-rockchip: Add internal phase support")
> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
> Tested-by: Marco Schirrmeister <mschirrmeister@gmail.com>

Reviewed-by: Heiko Stuebner <heiko@sntech.de>

> ---
> 
> Changes in v3: None
> Changes in v2: None
> 
>  drivers/mmc/host/dw_mmc-rockchip.c | 38 +++++++++++++++++++++++++++++++++++++-
>  1 file changed, 37 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c
> index 879188f..2fe0896 100644
> --- a/drivers/mmc/host/dw_mmc-rockchip.c
> +++ b/drivers/mmc/host/dw_mmc-rockchip.c
> @@ -36,6 +36,8 @@ struct dw_mci_rockchip_priv_data {
>  	int			default_sample_phase;
>  	int			num_phases;
>  	bool			internal_phase;
> +	int                     sample_phase;
> +	int                     drv_phase;
>  };
>  
>  /*
> @@ -573,9 +575,43 @@ static void dw_mci_rockchip_remove(struct platform_device *pdev)
>  	dw_mci_pltfm_remove(pdev);
>  }
>  
> +static int dw_mci_rockchip_runtime_suspend(struct device *dev)
> +{
> +	struct platform_device *pdev = to_platform_device(dev);
> +	struct dw_mci *host = platform_get_drvdata(pdev);
> +	struct dw_mci_rockchip_priv_data *priv = host->priv;
> +
> +	if (priv->internal_phase) {
> +		priv->sample_phase = rockchip_mmc_get_phase(host, true);
> +		priv->drv_phase = rockchip_mmc_get_phase(host, false);
> +	}
> +
> +	return dw_mci_runtime_suspend(dev);
> +}
> +
> +static int dw_mci_rockchip_runtime_resume(struct device *dev)
> +{
> +	struct platform_device *pdev = to_platform_device(dev);
> +	struct dw_mci *host = platform_get_drvdata(pdev);
> +	struct dw_mci_rockchip_priv_data *priv = host->priv;
> +	int ret;
> +
> +	ret = dw_mci_runtime_resume(dev);
> +	if (ret)
> +		return ret;
> +
> +	if (priv->internal_phase) {
> +		rockchip_mmc_set_phase(host, true, priv->sample_phase);
> +		rockchip_mmc_set_phase(host, false, priv->drv_phase);
> +		mci_writel(host, MISC_CON, MEM_CLK_AUTOGATE_ENABLE);
> +	}
> +
> +	return ret;
> +}
> +
>  static const struct dev_pm_ops dw_mci_rockchip_dev_pm_ops = {
>  	SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume)
> -	RUNTIME_PM_OPS(dw_mci_runtime_suspend, dw_mci_runtime_resume, NULL)
> +	RUNTIME_PM_OPS(dw_mci_rockchip_runtime_suspend, dw_mci_rockchip_runtime_resume, NULL)
>  };
>  
>  static struct platform_driver dw_mci_rockchip_pltfm_driver = {
>