From mboxrd@z Thu Jan 1 00:00:00 1970 From: Subject: [PATCH v3] add support for Mediatek Command-Queue DMA controller on MT6765 SoC Date: Thu, 18 Oct 2018 15:49:09 +0800 Message-ID: <1539848951-14798-1-git-send-email-shun-chih.yu@mediatek.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: Sender: linux-kernel-owner@vger.kernel.org To: Sean Wang , Vinod Koul , Rob Herring , Matthias Brugger , Dan Williams Cc: dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, srv_wsdupstream@mediatek.com List-Id: devicetree@vger.kernel.org Changes since v2: - fix build warning for kernel with DMA address in 32-bit Changes since v1: - remove unused macros, typos - leverage ASYNC_TX_ENABLE_CHANNEL_SWITCH to maintain DMA descriptor list Shun-Chih Yu (2): dt-bindings: dmaengine: Add MediaTek Command-Queue DMA controller bindings dmaengine: mediatek: Add MediaTek Command-Queue DMA controller for MT6765 SoC .../devicetree/bindings/dma/mtk-cqdma.txt | 31 + drivers/dma/mediatek/Kconfig | 13 + drivers/dma/mediatek/Makefile | 1 + drivers/dma/mediatek/mtk-cqdma.c | 951 ++++++++++++++++++++ 4 files changed, 996 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/mtk-cqdma.txt create mode 100644 drivers/dma/mediatek/mtk-cqdma.c