[PATCH 1/3] dt-bindings: mmc: fsl-imx-esdhc: add imx6ull compatible string

[PATCH 1/3] dt-bindings: mmc: fsl-imx-esdhc: add imx6ull compatible string

[BOUGH CHEN]

Add imx6ull compatible string

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
---
 Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt
index 9201a7d..540c65e 100644
--- a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt
+++ b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt
@@ -15,6 +15,7 @@ Required properties:
 	       "fsl,imx6q-usdhc"
 	       "fsl,imx6sl-usdhc"
 	       "fsl,imx6sx-usdhc"
+	       "fsl,imx6ull-usdhc"
 	       "fsl,imx7d-usdhc"
 	       "fsl,imx8qxp-usdhc"
 
-- 
1.9.1

[PATCH 2/3] mmc: sdhci-esdhc-imx: add SD clock limitation for imx6ull

[BOUGH CHEN]

i.MX6ULL has errata ERR010450, point out that due to SOC I/O
timing limitation, for eMMC HS200 and SD/SDIO 3.0 SDR104, the
clock rate can't exceed 150MHz. And for eMMC DDR52 and SD/SDIO
DDR50 mode, the clock rate can't exceed 45MHz.

This patch add this limit for imx6ull.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
---
 drivers/mmc/host/sdhci-esdhc-imx.c | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index d0d3193..75a2484 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -138,7 +138,11 @@
 #define ESDHC_FLAG_HS200		BIT(8)
 /* The IP supports HS400 mode */
 #define ESDHC_FLAG_HS400		BIT(9)
-
+/* The IP has errata ERR010450
+ * uSDHC: Due to the I/O timing limit, for SDR mode, SD card clock can't
+ * exceed 150MHz, for DDR mode, SD card clock can't exceed 45MHz.
+ */
+#define ESDHC_FLAG_ERR010450           BIT(10)
 /* A clock frequency higher than this rate requires strobe dll control */
 #define ESDHC_STROBE_DLL_CLK_FREQ	100000000
 
@@ -177,6 +181,12 @@ struct esdhc_soc_data {
 			| ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200,
 };
 
+static struct esdhc_soc_data usdhc_imx6ull_data = {
+	.flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_STD_TUNING
+			| ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200
+			| ESDHC_FLAG_ERR010450,
+};
+
 static struct esdhc_soc_data usdhc_imx7d_data = {
 	.flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_STD_TUNING
 			| ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200
@@ -227,6 +237,7 @@ struct pltfm_imx_data {
 	{ .compatible = "fsl,imx6sx-usdhc", .data = &usdhc_imx6sx_data, },
 	{ .compatible = "fsl,imx6sl-usdhc", .data = &usdhc_imx6sl_data, },
 	{ .compatible = "fsl,imx6q-usdhc", .data = &usdhc_imx6q_data, },
+	{ .compatible = "fsl,imx6ull-usdhc", .data = &usdhc_imx6ull_data, },
 	{ .compatible = "fsl,imx7d-usdhc", .data = &usdhc_imx7d_data, },
 	{ /* sentinel */ }
 };
@@ -733,6 +744,12 @@ static inline void esdhc_pltfm_set_clock(struct sdhci_host *host,
 		| ESDHC_CLOCK_MASK);
 	sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL);
 
+	if (imx_data->socdata->flags & ESDHC_FLAG_ERR010450) {
+		if (imx_data->is_ddr)
+			clock = clock > 45000000 ? 45000000 : clock;
+		else
+			clock = clock > 150000000 ? 150000000 : clock;
+
 	while (host_clock / (16 * pre_div * ddr_pre_div) > clock &&
 			pre_div < 256)
 		pre_div *= 2;
-- 
1.9.1

[PATCH 3/3] ARM: dts: imx6ull: change to use new compatible "fsl,imx6ull-usdhc" for usdhc

[BOUGH CHEN]

i.MX6ULL has errata ERR010450, there is I/O timing limitation,
for SDR mode, SD card clock can't exceed 150MHz, for DDR mode,
SD card clock can't exceed 45MHz. This patch change to use the
new compatible "fsl,imx6ull-usdhc" to follow this limitation.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
---
 arch/arm/boot/dts/imx6ull.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
index f3668fe..4ad5828 100644
--- a/arch/arm/boot/dts/imx6ull.dtsi
+++ b/arch/arm/boot/dts/imx6ull.dtsi
@@ -30,6 +30,14 @@
 	>;
 };
 
+&usdhc1 {
+	compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc";
+};
+
+&usdhc2 {
+	compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc";
+};
+
 / {
 	soc {
 		aips3: aips-bus@2200000 {
-- 
1.9.1

Re: [PATCH 2/3] mmc: sdhci-esdhc-imx: add SD clock limitation for imx6ull

[kbuild test robot]

[-- Attachment #1: Type: text/plain, Size: 7667 bytes --]

Hi BOUGH,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on ulf.hansson-mmc/next]
[also build test WARNING on v4.20-rc7 next-20181221]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/BOUGH-CHEN/dt-bindings-mmc-fsl-imx-esdhc-add-imx6ull-compatible-string/20181223-011123
base:   git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc.git next
config: arm-imx_v6_v7_defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        GCC_VERSION=7.2.0 make.cross ARCH=arm 

All warnings (new ones prefixed by >>):

   drivers/mmc/host/sdhci-esdhc-imx.c:1511:24: error: initializer element is not constant
    module_platform_driver(sdhci_esdhc_imx_driver);
                           ^
   include/linux/init.h:195:50: note: in definition of macro '___define_initcall'
      __attribute__((__section__(#__sec ".init"))) = fn;
                                                     ^~
   include/linux/init.h:227:30: note: in expansion of macro '__define_initcall'
    #define device_initcall(fn)  __define_initcall(fn, 6)
                                 ^~~~~~~~~~~~~~~~~
   include/linux/init.h:232:24: note: in expansion of macro 'device_initcall'
    #define __initcall(fn) device_initcall(fn)
                           ^~~~~~~~~~~~~~~
   include/linux/module.h:87:24: note: in expansion of macro '__initcall'
    #define module_init(x) __initcall(x);
                           ^~~~~~~~~~
   include/linux/device.h:1615:1: note: in expansion of macro 'module_init'
    module_init(__driver##_init); \
    ^~~~~~~~~~~
   include/linux/platform_device.h:229:2: note: in expansion of macro 'module_driver'
     module_driver(__platform_driver, platform_driver_register, \
     ^~~~~~~~~~~~~
   drivers/mmc/host/sdhci-esdhc-imx.c:1511:1: note: in expansion of macro 'module_platform_driver'
    module_platform_driver(sdhci_esdhc_imx_driver);
    ^~~~~~~~~~~~~~~~~~~~~~
   In file included from include/linux/mmc/host.h:14:0,
                    from drivers/mmc/host/sdhci-esdhc-imx.c:17:
   drivers/mmc/host/sdhci-esdhc-imx.c:1511:24: error: invalid storage class for function 'sdhci_esdhc_imx_driver_exit'
    module_platform_driver(sdhci_esdhc_imx_driver);
                           ^
   include/linux/device.h:1616:20: note: in definition of macro 'module_driver'
    static void __exit __driver##_exit(void) \
                       ^~~~~~~~
   drivers/mmc/host/sdhci-esdhc-imx.c:1511:1: note: in expansion of macro 'module_platform_driver'
    module_platform_driver(sdhci_esdhc_imx_driver);
    ^~~~~~~~~~~~~~~~~~~~~~
   include/linux/device.h:1616:1: warning: ISO C90 forbids mixed declarations and code [-Wdeclaration-after-statement]
    static void __exit __driver##_exit(void) \
    ^
   include/linux/platform_device.h:229:2: note: in expansion of macro 'module_driver'
     module_driver(__platform_driver, platform_driver_register, \
     ^~~~~~~~~~~~~
   drivers/mmc/host/sdhci-esdhc-imx.c:1511:1: note: in expansion of macro 'module_platform_driver'
    module_platform_driver(sdhci_esdhc_imx_driver);
    ^~~~~~~~~~~~~~~~~~~~~~
   In file included from include/linux/io.h:22:0,
                    from drivers/mmc/host/sdhci-esdhc-imx.c:11:
   drivers/mmc/host/sdhci-esdhc-imx.c:1511:24: error: initializer element is not constant
    module_platform_driver(sdhci_esdhc_imx_driver);
                           ^
   include/linux/init.h:235:50: note: in definition of macro '__exitcall'
     static exitcall_t __exitcall_##fn __exit_call = fn
                                                     ^~
   include/linux/device.h:1620:1: note: in expansion of macro 'module_exit'
    module_exit(__driver##_exit);
    ^~~~~~~~~~~
   include/linux/platform_device.h:229:2: note: in expansion of macro 'module_driver'
     module_driver(__platform_driver, platform_driver_register, \
     ^~~~~~~~~~~~~
   drivers/mmc/host/sdhci-esdhc-imx.c:1511:1: note: in expansion of macro 'module_platform_driver'
    module_platform_driver(sdhci_esdhc_imx_driver);
    ^~~~~~~~~~~~~~~~~~~~~~
   In file included from include/linux/module.h:18:0,
                    from drivers/mmc/host/sdhci-esdhc-imx.c:15:
   include/linux/moduleparam.h:28:3: warning: ISO C90 forbids mixed declarations and code [-Wdeclaration-after-statement]
      struct __UNIQUE_ID(name) {}
      ^
   include/linux/module.h:161:32: note: in expansion of macro '__MODULE_INFO'
    #define MODULE_INFO(tag, info) __MODULE_INFO(tag, tag, info)
                                   ^~~~~~~~~~~~~
   include/linux/module.h:208:42: note: in expansion of macro 'MODULE_INFO'
    #define MODULE_DESCRIPTION(_description) MODULE_INFO(description, _description)
                                             ^~~~~~~~~~~
   drivers/mmc/host/sdhci-esdhc-imx.c:1513:1: note: in expansion of macro 'MODULE_DESCRIPTION'
    MODULE_DESCRIPTION("SDHCI driver for Freescale i.MX eSDHC");
    ^~~~~~~~~~~~~~~~~~
   In file included from <command-line>:0:0:
   include/linux/compiler-gcc.h:75:45: error: expected declaration or statement at end of input
    #define __UNIQUE_ID(prefix) __PASTE(__PASTE(__UNIQUE_ID_, prefix), __COUNTER__)
                                                ^
   include/linux/compiler_types.h:53:23: note: in definition of macro '___PASTE'
    #define ___PASTE(a,b) a##b
                          ^
   include/linux/compiler-gcc.h:75:29: note: in expansion of macro '__PASTE'
    #define __UNIQUE_ID(prefix) __PASTE(__PASTE(__UNIQUE_ID_, prefix), __COUNTER__)
                                ^~~~~~~
   include/linux/compiler_types.h:54:22: note: in expansion of macro '___PASTE'
    #define __PASTE(a,b) ___PASTE(a,b)
                         ^~~~~~~~
   include/linux/compiler-gcc.h:75:37: note: in expansion of macro '__PASTE'
    #define __UNIQUE_ID(prefix) __PASTE(__PASTE(__UNIQUE_ID_, prefix), __COUNTER__)
                                        ^~~~~~~
   include/linux/moduleparam.h:28:10: note: in expansion of macro '__UNIQUE_ID'
      struct __UNIQUE_ID(name) {}
             ^~~~~~~~~~~
   include/linux/module.h:161:32: note: in expansion of macro '__MODULE_INFO'
    #define MODULE_INFO(tag, info) __MODULE_INFO(tag, tag, info)
                                   ^~~~~~~~~~~~~
   include/linux/module.h:199:34: note: in expansion of macro 'MODULE_INFO'
    #define MODULE_LICENSE(_license) MODULE_INFO(license, _license)
                                     ^~~~~~~~~~~
>> drivers/mmc/host/sdhci-esdhc-imx.c:1515:1: note: in expansion of macro 'MODULE_LICENSE'
    MODULE_LICENSE("GPL v2");
    ^~~~~~~~~~~~~~

vim +/MODULE_LICENSE +1515 drivers/mmc/host/sdhci-esdhc-imx.c

85d6509dc8 Shawn Guo    2011-05-27  1512  
85d6509dc8 Shawn Guo    2011-05-27  1513  MODULE_DESCRIPTION("SDHCI driver for Freescale i.MX eSDHC");
035ff831cd Wolfram Sang 2015-04-20  1514  MODULE_AUTHOR("Wolfram Sang <kernel@pengutronix.de>");
85d6509dc8 Shawn Guo    2011-05-27 @1515  MODULE_LICENSE("GPL v2");

:::::: The code at line 1515 was first introduced by commit
:::::: 85d6509dc8ca24b2b652863ef7a75622ddca17d6 mmc: sdhci: make sdhci-pltfm device drivers self registered

:::::: TO: Shawn Guo <shawn.guo@linaro.org>
:::::: CC: Chris Ball <cjb@laptop.org>

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

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Re: [PATCH 2/3] mmc: sdhci-esdhc-imx: add SD clock limitation for imx6ull

[kbuild test robot]

[-- Attachment #1: Type: text/plain, Size: 22353 bytes --]

Hi BOUGH,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on ulf.hansson-mmc/next]
[also build test ERROR on v4.20-rc7 next-20181221]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/BOUGH-CHEN/dt-bindings-mmc-fsl-imx-esdhc-add-imx6ull-compatible-string/20181223-011123
base:   git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc.git next
config: arm-allmodconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        GCC_VERSION=7.2.0 make.cross ARCH=arm 

All error/warnings (new ones prefixed by >>):

   drivers/mmc//host/sdhci-esdhc-imx.c: In function 'esdhc_pltfm_set_clock':
>> drivers/mmc//host/sdhci-esdhc-imx.c:782:21: error: invalid storage class for function 'esdhc_pltfm_get_ro'
    static unsigned int esdhc_pltfm_get_ro(struct sdhci_host *host)
                        ^~~~~~~~~~~~~~~~~~
>> drivers/mmc//host/sdhci-esdhc-imx.c:782:1: warning: ISO C90 forbids mixed declarations and code [-Wdeclaration-after-statement]
    static unsigned int esdhc_pltfm_get_ro(struct sdhci_host *host)
    ^~~~~~
>> drivers/mmc//host/sdhci-esdhc-imx.c:801:13: error: invalid storage class for function 'esdhc_pltfm_set_bus_width'
    static void esdhc_pltfm_set_bus_width(struct sdhci_host *host, int width)
                ^~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/mmc//host/sdhci-esdhc-imx.c:821:13: error: invalid storage class for function 'esdhc_prepare_tuning'
    static void esdhc_prepare_tuning(struct sdhci_host *host, u32 val)
                ^~~~~~~~~~~~~~~~~~~~
>> drivers/mmc//host/sdhci-esdhc-imx.c:838:13: error: invalid storage class for function 'esdhc_post_tuning'
    static void esdhc_post_tuning(struct sdhci_host *host)
                ^~~~~~~~~~~~~~~~~
>> drivers/mmc//host/sdhci-esdhc-imx.c:848:12: error: invalid storage class for function 'esdhc_executing_tuning'
    static int esdhc_executing_tuning(struct sdhci_host *host, u32 opcode)
               ^~~~~~~~~~~~~~~~~~~~~~
>> drivers/mmc//host/sdhci-esdhc-imx.c:884:12: error: invalid storage class for function 'esdhc_change_pinstate'
    static int esdhc_change_pinstate(struct sdhci_host *host,
               ^~~~~~~~~~~~~~~~~~~~~
>> drivers/mmc//host/sdhci-esdhc-imx.c:928:13: error: invalid storage class for function 'esdhc_set_strobe_dll'
    static void esdhc_set_strobe_dll(struct sdhci_host *host)
                ^~~~~~~~~~~~~~~~~~~~
>> drivers/mmc//host/sdhci-esdhc-imx.c:960:13: error: invalid storage class for function 'esdhc_reset_tuning'
    static void esdhc_reset_tuning(struct sdhci_host *host)
                ^~~~~~~~~~~~~~~~~~
>> drivers/mmc//host/sdhci-esdhc-imx.c:982:13: error: invalid storage class for function 'esdhc_set_uhs_signaling'
    static void esdhc_set_uhs_signaling(struct sdhci_host *host, unsigned timing)
                ^~~~~~~~~~~~~~~~~~~~~~~
>> drivers/mmc//host/sdhci-esdhc-imx.c:1034:13: error: invalid storage class for function 'esdhc_reset'
    static void esdhc_reset(struct sdhci_host *host, u8 mask)
                ^~~~~~~~~~~
>> drivers/mmc//host/sdhci-esdhc-imx.c:1042:21: error: invalid storage class for function 'esdhc_get_max_timeout_count'
    static unsigned int esdhc_get_max_timeout_count(struct sdhci_host *host)
                        ^~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/mmc//host/sdhci-esdhc-imx.c:1051:13: error: invalid storage class for function 'esdhc_set_timeout'
    static void esdhc_set_timeout(struct sdhci_host *host, struct mmc_command *cmd)
                ^~~~~~~~~~~~~~~~~
>> drivers/mmc//host/sdhci-esdhc-imx.c:1072:27: error: initializer element is not constant
     .get_max_timeout_count = esdhc_get_max_timeout_count,
                              ^~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/mmc//host/sdhci-esdhc-imx.c:1072:27: note: (near initialization for 'sdhci_esdhc_ops.get_max_timeout_count')
   drivers/mmc//host/sdhci-esdhc-imx.c:1073:12: error: initializer element is not constant
     .get_ro = esdhc_pltfm_get_ro,
               ^~~~~~~~~~~~~~~~~~
   drivers/mmc//host/sdhci-esdhc-imx.c:1073:12: note: (near initialization for 'sdhci_esdhc_ops.get_ro')
   drivers/mmc//host/sdhci-esdhc-imx.c:1074:17: error: initializer element is not constant
     .set_timeout = esdhc_set_timeout,
                    ^~~~~~~~~~~~~~~~~
   drivers/mmc//host/sdhci-esdhc-imx.c:1074:17: note: (near initialization for 'sdhci_esdhc_ops.set_timeout')
   drivers/mmc//host/sdhci-esdhc-imx.c:1075:19: error: initializer element is not constant
     .set_bus_width = esdhc_pltfm_set_bus_width,
                      ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/mmc//host/sdhci-esdhc-imx.c:1075:19: note: (near initialization for 'sdhci_esdhc_ops.set_bus_width')
   drivers/mmc//host/sdhci-esdhc-imx.c:1076:23: error: initializer element is not constant
     .set_uhs_signaling = esdhc_set_uhs_signaling,
                          ^~~~~~~~~~~~~~~~~~~~~~~
   drivers/mmc//host/sdhci-esdhc-imx.c:1076:23: note: (near initialization for 'sdhci_esdhc_ops.set_uhs_signaling')
   drivers/mmc//host/sdhci-esdhc-imx.c:1077:11: error: initializer element is not constant
     .reset = esdhc_reset,
              ^~~~~~~~~~~
   drivers/mmc//host/sdhci-esdhc-imx.c:1077:11: note: (near initialization for 'sdhci_esdhc_ops.reset')
>> drivers/mmc//host/sdhci-esdhc-imx.c:1088:13: error: invalid storage class for function 'sdhci_esdhc_imx_hwinit'
    static void sdhci_esdhc_imx_hwinit(struct sdhci_host *host)
                ^~~~~~~~~~~~~~~~~~~~~~
>> drivers/mmc//host/sdhci-esdhc-imx.c:1146:1: error: invalid storage class for function 'sdhci_esdhc_imx_probe_dt'
    sdhci_esdhc_imx_probe_dt(struct platform_device *pdev,
    ^~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/mmc//host/sdhci-esdhc-imx.c:1204:12: error: invalid storage class for function 'sdhci_esdhc_imx_probe_nondt'
    static int sdhci_esdhc_imx_probe_nondt(struct platform_device *pdev,
               ^~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/mmc//host/sdhci-esdhc-imx.c:1269:12: error: invalid storage class for function 'sdhci_esdhc_imx_probe'
    static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
               ^~~~~~~~~~~~~~~~~~~~~
>> drivers/mmc//host/sdhci-esdhc-imx.c:1385:12: error: invalid storage class for function 'sdhci_esdhc_imx_remove'
    static int sdhci_esdhc_imx_remove(struct platform_device *pdev)
               ^~~~~~~~~~~~~~~~~~~~~~
>> drivers/mmc//host/sdhci-esdhc-imx.c:1408:12: error: invalid storage class for function 'sdhci_esdhc_suspend'
    static int sdhci_esdhc_suspend(struct device *dev)
               ^~~~~~~~~~~~~~~~~~~

vim +/esdhc_pltfm_get_ro +782 drivers/mmc//host/sdhci-esdhc-imx.c

8ba9580a8 Lucas Stach       2013-06-05  781  
913413c30 Shawn Guo         2011-06-21 @782  static unsigned int esdhc_pltfm_get_ro(struct sdhci_host *host)
913413c30 Shawn Guo         2011-06-21  783  {
842afc02c Shawn Guo         2011-07-06  784  	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
070e6d3ff Jisheng Zhang     2016-02-16  785  	struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host);
842afc02c Shawn Guo         2011-07-06  786  	struct esdhc_platform_data *boarddata = &imx_data->boarddata;
913413c30 Shawn Guo         2011-06-21  787  
913413c30 Shawn Guo         2011-06-21  788  	switch (boarddata->wp_type) {
913413c30 Shawn Guo         2011-06-21  789  	case ESDHC_WP_GPIO:
fbe5fdd12 Shawn Guo         2012-12-11  790  		return mmc_gpio_get_ro(host->mmc);
913413c30 Shawn Guo         2011-06-21  791  	case ESDHC_WP_CONTROLLER:
913413c30 Shawn Guo         2011-06-21  792  		return !(readl(host->ioaddr + SDHCI_PRESENT_STATE) &
913413c30 Shawn Guo         2011-06-21  793  			       SDHCI_WRITE_PROTECT);
913413c30 Shawn Guo         2011-06-21  794  	case ESDHC_WP_NONE:
913413c30 Shawn Guo         2011-06-21  795  		break;
913413c30 Shawn Guo         2011-06-21  796  	}
913413c30 Shawn Guo         2011-06-21  797  
913413c30 Shawn Guo         2011-06-21  798  	return -ENOSYS;
913413c30 Shawn Guo         2011-06-21  799  }
913413c30 Shawn Guo         2011-06-21  800  
2317f56c0 Russell King      2014-04-25 @801  static void esdhc_pltfm_set_bus_width(struct sdhci_host *host, int width)
af51079e6 Sascha Hauer      2013-01-21  802  {
af51079e6 Sascha Hauer      2013-01-21  803  	u32 ctrl;
af51079e6 Sascha Hauer      2013-01-21  804  
af51079e6 Sascha Hauer      2013-01-21  805  	switch (width) {
af51079e6 Sascha Hauer      2013-01-21  806  	case MMC_BUS_WIDTH_8:
af51079e6 Sascha Hauer      2013-01-21  807  		ctrl = ESDHC_CTRL_8BITBUS;
af51079e6 Sascha Hauer      2013-01-21  808  		break;
af51079e6 Sascha Hauer      2013-01-21  809  	case MMC_BUS_WIDTH_4:
af51079e6 Sascha Hauer      2013-01-21  810  		ctrl = ESDHC_CTRL_4BITBUS;
af51079e6 Sascha Hauer      2013-01-21  811  		break;
af51079e6 Sascha Hauer      2013-01-21  812  	default:
af51079e6 Sascha Hauer      2013-01-21  813  		ctrl = 0;
af51079e6 Sascha Hauer      2013-01-21  814  		break;
af51079e6 Sascha Hauer      2013-01-21  815  	}
af51079e6 Sascha Hauer      2013-01-21  816  
af51079e6 Sascha Hauer      2013-01-21  817  	esdhc_clrset_le(host, ESDHC_CTRL_BUSWIDTH_MASK, ctrl,
af51079e6 Sascha Hauer      2013-01-21  818  			SDHCI_HOST_CONTROL);
af51079e6 Sascha Hauer      2013-01-21  819  }
af51079e6 Sascha Hauer      2013-01-21  820  
0322191e6 Dong Aisheng      2013-09-13 @821  static void esdhc_prepare_tuning(struct sdhci_host *host, u32 val)
0322191e6 Dong Aisheng      2013-09-13  822  {
0322191e6 Dong Aisheng      2013-09-13  823  	u32 reg;
0322191e6 Dong Aisheng      2013-09-13  824  
0322191e6 Dong Aisheng      2013-09-13  825  	/* FIXME: delay a bit for card to be ready for next tuning due to errors */
0322191e6 Dong Aisheng      2013-09-13  826  	mdelay(1);
0322191e6 Dong Aisheng      2013-09-13  827  
0322191e6 Dong Aisheng      2013-09-13  828  	reg = readl(host->ioaddr + ESDHC_MIX_CTRL);
0322191e6 Dong Aisheng      2013-09-13  829  	reg |= ESDHC_MIX_CTRL_EXE_TUNE | ESDHC_MIX_CTRL_SMPCLK_SEL |
0322191e6 Dong Aisheng      2013-09-13  830  			ESDHC_MIX_CTRL_FBCLK_SEL;
0322191e6 Dong Aisheng      2013-09-13  831  	writel(reg, host->ioaddr + ESDHC_MIX_CTRL);
0322191e6 Dong Aisheng      2013-09-13  832  	writel(val << 8, host->ioaddr + ESDHC_TUNE_CTRL_STATUS);
0322191e6 Dong Aisheng      2013-09-13  833  	dev_dbg(mmc_dev(host->mmc),
d04f8d5b9 Beno�t Th�baudeau 2017-05-30  834  		"tuning with delay 0x%x ESDHC_TUNE_CTRL_STATUS 0x%x\n",
0322191e6 Dong Aisheng      2013-09-13  835  			val, readl(host->ioaddr + ESDHC_TUNE_CTRL_STATUS));
0322191e6 Dong Aisheng      2013-09-13  836  }
0322191e6 Dong Aisheng      2013-09-13  837  
0322191e6 Dong Aisheng      2013-09-13 @838  static void esdhc_post_tuning(struct sdhci_host *host)
0322191e6 Dong Aisheng      2013-09-13  839  {
0322191e6 Dong Aisheng      2013-09-13  840  	u32 reg;
0322191e6 Dong Aisheng      2013-09-13  841  
0322191e6 Dong Aisheng      2013-09-13  842  	reg = readl(host->ioaddr + ESDHC_MIX_CTRL);
0322191e6 Dong Aisheng      2013-09-13  843  	reg &= ~ESDHC_MIX_CTRL_EXE_TUNE;
da0295ff1 Dong Aisheng      2016-07-12  844  	reg |= ESDHC_MIX_CTRL_AUTO_TUNE_EN;
0322191e6 Dong Aisheng      2013-09-13  845  	writel(reg, host->ioaddr + ESDHC_MIX_CTRL);
0322191e6 Dong Aisheng      2013-09-13  846  }
0322191e6 Dong Aisheng      2013-09-13  847  
0322191e6 Dong Aisheng      2013-09-13 @848  static int esdhc_executing_tuning(struct sdhci_host *host, u32 opcode)
0322191e6 Dong Aisheng      2013-09-13  849  {
0322191e6 Dong Aisheng      2013-09-13  850  	int min, max, avg, ret;
0322191e6 Dong Aisheng      2013-09-13  851  
0322191e6 Dong Aisheng      2013-09-13  852  	/* find the mininum delay first which can pass tuning */
0322191e6 Dong Aisheng      2013-09-13  853  	min = ESDHC_TUNE_CTRL_MIN;
0322191e6 Dong Aisheng      2013-09-13  854  	while (min < ESDHC_TUNE_CTRL_MAX) {
0322191e6 Dong Aisheng      2013-09-13  855  		esdhc_prepare_tuning(host, min);
9979dbe51 Chaotian Jing     2015-10-27  856  		if (!mmc_send_tuning(host->mmc, opcode, NULL))
0322191e6 Dong Aisheng      2013-09-13  857  			break;
0322191e6 Dong Aisheng      2013-09-13  858  		min += ESDHC_TUNE_CTRL_STEP;
0322191e6 Dong Aisheng      2013-09-13  859  	}
0322191e6 Dong Aisheng      2013-09-13  860  
0322191e6 Dong Aisheng      2013-09-13  861  	/* find the maxinum delay which can not pass tuning */
0322191e6 Dong Aisheng      2013-09-13  862  	max = min + ESDHC_TUNE_CTRL_STEP;
0322191e6 Dong Aisheng      2013-09-13  863  	while (max < ESDHC_TUNE_CTRL_MAX) {
0322191e6 Dong Aisheng      2013-09-13  864  		esdhc_prepare_tuning(host, max);
9979dbe51 Chaotian Jing     2015-10-27  865  		if (mmc_send_tuning(host->mmc, opcode, NULL)) {
0322191e6 Dong Aisheng      2013-09-13  866  			max -= ESDHC_TUNE_CTRL_STEP;
0322191e6 Dong Aisheng      2013-09-13  867  			break;
0322191e6 Dong Aisheng      2013-09-13  868  		}
0322191e6 Dong Aisheng      2013-09-13  869  		max += ESDHC_TUNE_CTRL_STEP;
0322191e6 Dong Aisheng      2013-09-13  870  	}
0322191e6 Dong Aisheng      2013-09-13  871  
0322191e6 Dong Aisheng      2013-09-13  872  	/* use average delay to get the best timing */
0322191e6 Dong Aisheng      2013-09-13  873  	avg = (min + max) / 2;
0322191e6 Dong Aisheng      2013-09-13  874  	esdhc_prepare_tuning(host, avg);
9979dbe51 Chaotian Jing     2015-10-27  875  	ret = mmc_send_tuning(host->mmc, opcode, NULL);
0322191e6 Dong Aisheng      2013-09-13  876  	esdhc_post_tuning(host);
0322191e6 Dong Aisheng      2013-09-13  877  
d04f8d5b9 Beno�t Th�baudeau 2017-05-30  878  	dev_dbg(mmc_dev(host->mmc), "tuning %s at 0x%x ret %d\n",
0322191e6 Dong Aisheng      2013-09-13  879  		ret ? "failed" : "passed", avg, ret);
0322191e6 Dong Aisheng      2013-09-13  880  
0322191e6 Dong Aisheng      2013-09-13  881  	return ret;
0322191e6 Dong Aisheng      2013-09-13  882  }
0322191e6 Dong Aisheng      2013-09-13  883  
ad93220de Dong Aisheng      2013-09-13 @884  static int esdhc_change_pinstate(struct sdhci_host *host,
ad93220de Dong Aisheng      2013-09-13  885  						unsigned int uhs)
ad93220de Dong Aisheng      2013-09-13  886  {
ad93220de Dong Aisheng      2013-09-13  887  	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
070e6d3ff Jisheng Zhang     2016-02-16  888  	struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host);
ad93220de Dong Aisheng      2013-09-13  889  	struct pinctrl_state *pinctrl;
ad93220de Dong Aisheng      2013-09-13  890  
ad93220de Dong Aisheng      2013-09-13  891  	dev_dbg(mmc_dev(host->mmc), "change pinctrl state for uhs %d\n", uhs);
ad93220de Dong Aisheng      2013-09-13  892  
ad93220de Dong Aisheng      2013-09-13  893  	if (IS_ERR(imx_data->pinctrl) ||
ad93220de Dong Aisheng      2013-09-13  894  		IS_ERR(imx_data->pins_default) ||
ad93220de Dong Aisheng      2013-09-13  895  		IS_ERR(imx_data->pins_100mhz) ||
ad93220de Dong Aisheng      2013-09-13  896  		IS_ERR(imx_data->pins_200mhz))
ad93220de Dong Aisheng      2013-09-13  897  		return -EINVAL;
ad93220de Dong Aisheng      2013-09-13  898  
ad93220de Dong Aisheng      2013-09-13  899  	switch (uhs) {
ad93220de Dong Aisheng      2013-09-13  900  	case MMC_TIMING_UHS_SDR50:
9f3278453 Haibo Chen        2017-04-19  901  	case MMC_TIMING_UHS_DDR50:
ad93220de Dong Aisheng      2013-09-13  902  		pinctrl = imx_data->pins_100mhz;
ad93220de Dong Aisheng      2013-09-13  903  		break;
ad93220de Dong Aisheng      2013-09-13  904  	case MMC_TIMING_UHS_SDR104:
429a5b45f Dong Aisheng      2013-10-30  905  	case MMC_TIMING_MMC_HS200:
28b07674f Haibo Chen        2015-08-11  906  	case MMC_TIMING_MMC_HS400:
ad93220de Dong Aisheng      2013-09-13  907  		pinctrl = imx_data->pins_200mhz;
ad93220de Dong Aisheng      2013-09-13  908  		break;
ad93220de Dong Aisheng      2013-09-13  909  	default:
ad93220de Dong Aisheng      2013-09-13  910  		/* back to default state for other legacy timing */
ad93220de Dong Aisheng      2013-09-13  911  		pinctrl = imx_data->pins_default;
ad93220de Dong Aisheng      2013-09-13  912  	}
ad93220de Dong Aisheng      2013-09-13  913  
ad93220de Dong Aisheng      2013-09-13  914  	return pinctrl_select_state(imx_data->pinctrl, pinctrl);
ad93220de Dong Aisheng      2013-09-13  915  }
ad93220de Dong Aisheng      2013-09-13  916  
28b07674f Haibo Chen        2015-08-11  917  /*
d04f8d5b9 Beno�t Th�baudeau 2017-05-30  918   * For HS400 eMMC, there is a data_strobe line. This signal is generated
28b07674f Haibo Chen        2015-08-11  919   * by the device and used for data output and CRC status response output
28b07674f Haibo Chen        2015-08-11  920   * in HS400 mode. The frequency of this signal follows the frequency of
d04f8d5b9 Beno�t Th�baudeau 2017-05-30  921   * CLK generated by host. The host receives the data which is aligned to the
28b07674f Haibo Chen        2015-08-11  922   * edge of data_strobe line. Due to the time delay between CLK line and
28b07674f Haibo Chen        2015-08-11  923   * data_strobe line, if the delay time is larger than one clock cycle,
d04f8d5b9 Beno�t Th�baudeau 2017-05-30  924   * then CLK and data_strobe line will be misaligned, read error shows up.
28b07674f Haibo Chen        2015-08-11  925   * So when the CLK is higher than 100MHz, each clock cycle is short enough,
d04f8d5b9 Beno�t Th�baudeau 2017-05-30  926   * host should configure the delay target.
28b07674f Haibo Chen        2015-08-11  927   */
28b07674f Haibo Chen        2015-08-11 @928  static void esdhc_set_strobe_dll(struct sdhci_host *host)
28b07674f Haibo Chen        2015-08-11  929  {
28b07674f Haibo Chen        2015-08-11  930  	u32 v;
28b07674f Haibo Chen        2015-08-11  931  
28b07674f Haibo Chen        2015-08-11  932  	if (host->mmc->actual_clock > ESDHC_STROBE_DLL_CLK_FREQ) {
7ac6da262 Dong Aisheng      2016-07-12  933  		/* disable clock before enabling strobe dll */
7ac6da262 Dong Aisheng      2016-07-12  934  		writel(readl(host->ioaddr + ESDHC_VENDOR_SPEC) &
7ac6da262 Dong Aisheng      2016-07-12  935  		       ~ESDHC_VENDOR_SPEC_FRC_SDCLK_ON,
7ac6da262 Dong Aisheng      2016-07-12  936  		       host->ioaddr + ESDHC_VENDOR_SPEC);
7ac6da262 Dong Aisheng      2016-07-12  937  
28b07674f Haibo Chen        2015-08-11  938  		/* force a reset on strobe dll */
28b07674f Haibo Chen        2015-08-11  939  		writel(ESDHC_STROBE_DLL_CTRL_RESET,
28b07674f Haibo Chen        2015-08-11  940  			host->ioaddr + ESDHC_STROBE_DLL_CTRL);
28b07674f Haibo Chen        2015-08-11  941  		/*
28b07674f Haibo Chen        2015-08-11  942  		 * enable strobe dll ctrl and adjust the delay target
28b07674f Haibo Chen        2015-08-11  943  		 * for the uSDHC loopback read clock
28b07674f Haibo Chen        2015-08-11  944  		 */
28b07674f Haibo Chen        2015-08-11  945  		v = ESDHC_STROBE_DLL_CTRL_ENABLE |
28b07674f Haibo Chen        2015-08-11  946  			(7 << ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_SHIFT);
28b07674f Haibo Chen        2015-08-11  947  		writel(v, host->ioaddr + ESDHC_STROBE_DLL_CTRL);
28b07674f Haibo Chen        2015-08-11  948  		/* wait 1us to make sure strobe dll status register stable */
28b07674f Haibo Chen        2015-08-11  949  		udelay(1);
28b07674f Haibo Chen        2015-08-11  950  		v = readl(host->ioaddr + ESDHC_STROBE_DLL_STATUS);
28b07674f Haibo Chen        2015-08-11  951  		if (!(v & ESDHC_STROBE_DLL_STS_REF_LOCK))
28b07674f Haibo Chen        2015-08-11  952  			dev_warn(mmc_dev(host->mmc),
28b07674f Haibo Chen        2015-08-11  953  				"warning! HS400 strobe DLL status REF not lock!\n");
28b07674f Haibo Chen        2015-08-11  954  		if (!(v & ESDHC_STROBE_DLL_STS_SLV_LOCK))
28b07674f Haibo Chen        2015-08-11  955  			dev_warn(mmc_dev(host->mmc),
28b07674f Haibo Chen        2015-08-11  956  				"warning! HS400 strobe DLL status SLV not lock!\n");
28b07674f Haibo Chen        2015-08-11  957  	}
28b07674f Haibo Chen        2015-08-11  958  }
28b07674f Haibo Chen        2015-08-11  959  
d9370424c Haibo Chen        2017-04-18 @960  static void esdhc_reset_tuning(struct sdhci_host *host)
d9370424c Haibo Chen        2017-04-18  961  {
d9370424c Haibo Chen        2017-04-18  962  	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
d9370424c Haibo Chen        2017-04-18  963  	struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host);
d9370424c Haibo Chen        2017-04-18  964  	u32 ctrl;
d9370424c Haibo Chen        2017-04-18  965  
d04f8d5b9 Beno�t Th�baudeau 2017-05-30  966  	/* Reset the tuning circuit */
d9370424c Haibo Chen        2017-04-18  967  	if (esdhc_is_usdhc(imx_data)) {
d9370424c Haibo Chen        2017-04-18  968  		if (imx_data->socdata->flags & ESDHC_FLAG_MAN_TUNING) {
d9370424c Haibo Chen        2017-04-18  969  			ctrl = readl(host->ioaddr + ESDHC_MIX_CTRL);
d9370424c Haibo Chen        2017-04-18  970  			ctrl &= ~ESDHC_MIX_CTRL_SMPCLK_SEL;
d9370424c Haibo Chen        2017-04-18  971  			ctrl &= ~ESDHC_MIX_CTRL_FBCLK_SEL;
d9370424c Haibo Chen        2017-04-18  972  			writel(ctrl, host->ioaddr + ESDHC_MIX_CTRL);
d9370424c Haibo Chen        2017-04-18  973  			writel(0, host->ioaddr + ESDHC_TUNE_CTRL_STATUS);
d9370424c Haibo Chen        2017-04-18  974  		} else if (imx_data->socdata->flags & ESDHC_FLAG_STD_TUNING) {
869f8a69b Adrian Hunter     2018-11-15  975  			ctrl = readl(host->ioaddr + SDHCI_AUTO_CMD_STATUS);
d9370424c Haibo Chen        2017-04-18  976  			ctrl &= ~ESDHC_MIX_CTRL_SMPCLK_SEL;
869f8a69b Adrian Hunter     2018-11-15  977  			writel(ctrl, host->ioaddr + SDHCI_AUTO_CMD_STATUS);
d9370424c Haibo Chen        2017-04-18  978  		}
d9370424c Haibo Chen        2017-04-18  979  	}
d9370424c Haibo Chen        2017-04-18  980  }
d9370424c Haibo Chen        2017-04-18  981  

:::::: The code at line 782 was first introduced by commit
:::::: 913413c307c919f8b21edccea23a9fd9d9d49a64 mmc: sdhci-esdhc-imx: extend card_detect and write_protect support for mx5

:::::: TO: Shawn Guo <shawn.guo@linaro.org>
:::::: CC: Shawn Guo <shawn.guo@linaro.org>

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 67729 bytes --]

Re: [PATCH 2/3] mmc: sdhci-esdhc-imx: add SD clock limitation for imx6ull

[Adrian Hunter]

On 20/12/18 9:49 AM, BOUGH CHEN wrote:
> i.MX6ULL has errata ERR010450, point out that due to SOC I/O
> timing limitation, for eMMC HS200 and SD/SDIO 3.0 SDR104, the
> clock rate can't exceed 150MHz. And for eMMC DDR52 and SD/SDIO
> DDR50 mode, the clock rate can't exceed 45MHz.
> 
> This patch add this limit for imx6ull.
> 
> Signed-off-by: Haibo Chen <haibo.chen@nxp.com>

Apart from the kbuild test robot complaints (do they need to be fixed?):

Acked-by: Adrian Hunter <adrian.hunter@intel.com>

> ---
>  drivers/mmc/host/sdhci-esdhc-imx.c | 19 ++++++++++++++++++-
>  1 file changed, 18 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
> index d0d3193..75a2484 100644
> --- a/drivers/mmc/host/sdhci-esdhc-imx.c
> +++ b/drivers/mmc/host/sdhci-esdhc-imx.c
> @@ -138,7 +138,11 @@
>  #define ESDHC_FLAG_HS200		BIT(8)
>  /* The IP supports HS400 mode */
>  #define ESDHC_FLAG_HS400		BIT(9)
> -
> +/* The IP has errata ERR010450
> + * uSDHC: Due to the I/O timing limit, for SDR mode, SD card clock can't
> + * exceed 150MHz, for DDR mode, SD card clock can't exceed 45MHz.
> + */
> +#define ESDHC_FLAG_ERR010450           BIT(10)
>  /* A clock frequency higher than this rate requires strobe dll control */
>  #define ESDHC_STROBE_DLL_CLK_FREQ	100000000
>  
> @@ -177,6 +181,12 @@ struct esdhc_soc_data {
>  			| ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200,
>  };
>  
> +static struct esdhc_soc_data usdhc_imx6ull_data = {
> +	.flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_STD_TUNING
> +			| ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200
> +			| ESDHC_FLAG_ERR010450,
> +};
> +
>  static struct esdhc_soc_data usdhc_imx7d_data = {
>  	.flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_STD_TUNING
>  			| ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200
> @@ -227,6 +237,7 @@ struct pltfm_imx_data {
>  	{ .compatible = "fsl,imx6sx-usdhc", .data = &usdhc_imx6sx_data, },
>  	{ .compatible = "fsl,imx6sl-usdhc", .data = &usdhc_imx6sl_data, },
>  	{ .compatible = "fsl,imx6q-usdhc", .data = &usdhc_imx6q_data, },
> +	{ .compatible = "fsl,imx6ull-usdhc", .data = &usdhc_imx6ull_data, },
>  	{ .compatible = "fsl,imx7d-usdhc", .data = &usdhc_imx7d_data, },
>  	{ /* sentinel */ }
>  };
> @@ -733,6 +744,12 @@ static inline void esdhc_pltfm_set_clock(struct sdhci_host *host,
>  		| ESDHC_CLOCK_MASK);
>  	sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL);
>  
> +	if (imx_data->socdata->flags & ESDHC_FLAG_ERR010450) {
> +		if (imx_data->is_ddr)
> +			clock = clock > 45000000 ? 45000000 : clock;
> +		else
> +			clock = clock > 150000000 ? 150000000 : clock;
> +
>  	while (host_clock / (16 * pre_div * ddr_pre_div) > clock &&
>  			pre_div < 256)
>  		pre_div *= 2;
> 

Re: [PATCH 2/3] mmc: sdhci-esdhc-imx: add SD clock limitation for imx6ull

[Russell King - ARM Linux]

On Thu, Dec 27, 2018 at 10:01:24AM +0200, Adrian Hunter wrote:
> On 20/12/18 9:49 AM, BOUGH CHEN wrote:
> > i.MX6ULL has errata ERR010450, point out that due to SOC I/O
> > timing limitation, for eMMC HS200 and SD/SDIO 3.0 SDR104, the
> > clock rate can't exceed 150MHz. And for eMMC DDR52 and SD/SDIO
> > DDR50 mode, the clock rate can't exceed 45MHz.
> > 
> > This patch add this limit for imx6ull.
> > 
> > Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
> 
> Apart from the kbuild test robot complaints (do they need to be fixed?):
> 
> Acked-by: Adrian Hunter <adrian.hunter@intel.com>

Nacked-by: Russell King <rmk+kernel@armlinux.org.uk>

The kbuild test robot complaints do need to be fixed first.  They're
confusing because GCC produces quite a lot of garbage in its error
messages now.  If you look at the patch, there's a hunk that has:

+       if (imx_data->socdata->flags & ESDHC_FLAG_ERR010450) {
+               if (imx_data->is_ddr)
+                       clock = clock > 45000000 ? 45000000 : clock;
+               else
+                       clock = clock > 150000000 ? 150000000 : clock;
+

which is missing a closing brace.  This patch could not have been
build tested before it was mailed to the list, and the test robot
is highlighting that fact.

It may also be a good idea to encourage a different approach to the
above anyway:

	if (imx_data->socdata->flags & ESDHC_FLAG_ERR010450) {
		unsigned long max_clock;

		max_clock = imx_data->is_ddr ? 45000000 : 150000000;

		clock = max(clock, max_clock);
	}

rather than open-coding the max() stuff in the driver.

Thanks.

-- 
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
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RE: [PATCH 2/3] mmc: sdhci-esdhc-imx: add SD clock limitation for imx6ull

[BOUGH CHEN]

> -----Original Message-----
> From: Russell King - ARM Linux [mailto:linux@armlinux.org.uk]
> Sent: 2018年12月27日 20:23
> To: Adrian Hunter <adrian.hunter@intel.com>
> Cc: BOUGH CHEN <haibo.chen@nxp.com>; ulf.hansson@linaro.org;
> robh+dt@kernel.org; mark.rutland@arm.com; shawnguo@kernel.org;
> s.hauer@pengutronix.de; kernel@pengutronix.de; Fabio Estevam
> <fabio.estevam@nxp.com>; devicetree@vger.kernel.org;
> linux-mmc@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> linux-arm-kernel@lists.infradead.org
> Subject: Re: [PATCH 2/3] mmc: sdhci-esdhc-imx: add SD clock limitation for
> imx6ull
> 
> On Thu, Dec 27, 2018 at 10:01:24AM +0200, Adrian Hunter wrote:
> > On 20/12/18 9:49 AM, BOUGH CHEN wrote:
> > > i.MX6ULL has errata ERR010450, point out that due to SOC I/O timing
> > > limitation, for eMMC HS200 and SD/SDIO 3.0 SDR104, the clock rate
> > > can't exceed 150MHz. And for eMMC DDR52 and SD/SDIO
> > > DDR50 mode, the clock rate can't exceed 45MHz.
> > >
> > > This patch add this limit for imx6ull.
> > >
> > > Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
> >
> > Apart from the kbuild test robot complaints (do they need to be fixed?):
> >
> > Acked-by: Adrian Hunter <adrian.hunter@intel.com>
> 
> Nacked-by: Russell King <rmk+kernel@armlinux.org.uk>
> 
> The kbuild test robot complaints do need to be fixed first.  They're confusing
> because GCC produces quite a lot of garbage in its error messages now.  If
> you look at the patch, there's a hunk that has:
> 
> +       if (imx_data->socdata->flags & ESDHC_FLAG_ERR010450) {
> +               if (imx_data->is_ddr)
> +                       clock = clock > 45000000 ? 45000000 : clock;
> +               else
> +                       clock = clock > 150000000 ? 150000000 : clock;
> +
> 
> which is missing a closing brace.  This patch could not have been build tested
> before it was mailed to the list, and the test robot is highlighting that fact.
> 

I'm really sorry about that.  Thanks for point out that, I will double check my patch when I mail to the list next time.

> It may also be a good idea to encourage a different approach to the above
> anyway:
> 
> 	if (imx_data->socdata->flags & ESDHC_FLAG_ERR010450) {
> 		unsigned long max_clock;
> 
> 		max_clock = imx_data->is_ddr ? 45000000 : 150000000;
> 
> 		clock = max(clock, max_clock);
> 	}
> 
> rather than open-coding the max() stuff in the driver.

Thanks for giving such a good suggestion, I will take care of it, with a little change:
		clock = min(clock, max_clock);

Best Regard
Bough Chen
> 
> Thanks.
> 
> --
> RMK's Patch system:
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