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From: CK Hu <ck.hu@mediatek.com>
To: Yongqiang Niu <yongqiang.niu@mediatek.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org, David Airlie <airlied@linux.ie>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	Rob Herring <robh+dt@kernel.org>,
	linux-mediatek@lists.infradead.org,
	Matthias Brugger <matthias.bgg@gmail.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 13/18] drm/mediatek: add ddp write register common api
Date: Thu, 27 Dec 2018 12:26:22 +0800	[thread overview]
Message-ID: <1545884782.31506.4.camel@mtksdaap41> (raw)
In-Reply-To: <1545638931-24938-14-git-send-email-yongqiang.niu@mediatek.com>

Hi, Yongqiang:

On Mon, 2018-12-24 at 16:08 +0800, Yongqiang Niu wrote:
> This patch add ddp write register common api
> 

I could not see anywhere you use these function. If the function is
useless, drop this patch.

Regards,
CK

> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 24 ++++++++++++++++++++++++
>  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h |  9 +++++++++
>  2 files changed, 33 insertions(+)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> index a97e27b..1c0f9cc 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> @@ -84,6 +84,30 @@
>  #define DITHER_ADD_LSHIFT_G(x)			(((x) & 0x7) << 4)
>  #define DITHER_ADD_RSHIFT_G(x)			(((x) & 0x7) << 0)
>  
> +void mtk_ddp_write(unsigned int value, struct mtk_ddp_comp *comp,
> +		   unsigned int offset)
> +{
> +	writel(value, comp->regs + offset);
> +}
> +
> +void mtk_ddp_write_relaxed(unsigned int value,
> +			   struct mtk_ddp_comp *comp,
> +			   unsigned int offset)
> +{
> +	writel_relaxed(value, comp->regs + offset);
> +}
> +
> +void mtk_ddp_write_mask(unsigned int value,
> +			struct mtk_ddp_comp *comp,
> +			unsigned int offset,
> +			unsigned int mask)
> +{
> +	unsigned int tmp = readl(comp->regs + offset);
> +
> +	tmp = (tmp & ~mask) | (value & mask);
> +	writel(tmp, comp->regs + offset);
> +}
> +
>  void mtk_dither_set(struct mtk_ddp_comp *comp, unsigned int bpc,
>  		    unsigned int CFG)
>  {
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> index f2ab0b3..b908172 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> @@ -189,5 +189,14 @@ int mtk_ddp_comp_init(struct device *dev, struct device_node *comp_node,
>  void mtk_ddp_comp_unregister(struct drm_device *drm, struct mtk_ddp_comp *comp);
>  void mtk_dither_set(struct mtk_ddp_comp *comp, unsigned int bpc,
>  		    unsigned int CFG);
> +void mtk_ddp_write(unsigned int value, struct mtk_ddp_comp *comp,
> +		   unsigned int offset);
> +void mtk_ddp_write_relaxed(unsigned int value,
> +			   struct mtk_ddp_comp *comp,
> +			   unsigned int offset);
> +void mtk_ddp_write_mask(unsigned int value,
> +			struct mtk_ddp_comp *comp,
> +			unsigned int offset,
> +			unsigned int mask);
>  
>  #endif /* MTK_DRM_DDP_COMP_H */


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  reply	other threads:[~2018-12-27  4:26 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-24  8:08 [PATCH 00/18] add drm support for MT8183 Yongqiang Niu
2018-12-24  8:08 ` [PATCH 01/18] drm/mediatek: update dt-bindings for mt8183 Yongqiang Niu
2018-12-26  1:49   ` CK Hu
2018-12-24  8:08 ` [PATCH 02/18] drm/mediatek: add mutex mod and sof into ddp private data Yongqiang Niu
2018-12-26  2:56   ` CK Hu
2018-12-24  8:08 ` [PATCH 03/18] drm/mediatek: redefine mtk_ddp_sout_sel Yongqiang Niu
2018-12-25  3:57   ` Nicolas Boichat
2019-03-15  2:06     ` Yongqiang Niu
2019-03-15  3:22       ` Nicolas Boichat
2018-12-24  8:08 ` [PATCH 04/18] drm/mediatek: move rdma sout from mtk_ddp_mout_en into mtk_ddp_sout_sel Yongqiang Niu
2018-12-26  3:51   ` CK Hu
2018-12-24  8:08 ` [PATCH 05/18] drm/mediatek: add ddp component CCORR Yongqiang Niu
2018-12-26  5:27   ` CK Hu
2018-12-24  8:08 ` [PATCH 06/18] drm/mediatek: add mmsys private data for ddp path config Yongqiang Niu
2018-12-26  6:01   ` CK Hu
2018-12-24  8:08 ` [PATCH 07/18] drm/mediatek: add commponent OVL0_2L Yongqiang Niu
2018-12-26  9:09   ` CK Hu
2018-12-24  8:08 ` [PATCH 08/18] drm/mediatek: add component OVL1_2L Yongqiang Niu
2018-12-24  8:08 ` [PATCH 09/18] drm/mediatek: add component DITHER Yongqiang Niu
2018-12-26  9:13   ` CK Hu
2018-12-24  8:08 ` [PATCH 10/18] drm/mediatek: add gmc_bits for ovl private data Yongqiang Niu
2018-12-25  4:15   ` Nicolas Boichat
2019-03-15  2:34     ` Yongqiang Niu
2019-03-15  3:26       ` Nicolas Boichat
2018-12-24  8:08 ` [PATCH 11/18] drm/medaitek: add layer_nr " Yongqiang Niu
2018-12-27  1:16   ` CK Hu
2018-12-24  8:08 ` [PATCH 12/18] drm/mediatek: add function to connect module with it's previous one Yongqiang Niu
2018-12-24  8:08 ` [PATCH 13/18] drm/mediatek: add ddp write register common api Yongqiang Niu
2018-12-27  4:26   ` CK Hu [this message]
2018-12-24  8:08 ` [PATCH 14/18] drm/mediatek: add connect function for ovl Yongqiang Niu
2018-12-27  4:56   ` CK Hu
2018-12-24  8:08 ` [PATCH 15/18] drm/mediatek: add RDMA1 fifo size into RDMA private data Yongqiang Niu
2018-12-27  8:08   ` CK Hu
2018-12-24  8:08 ` [PATCH 16/18] drm/mediatek: add function mtk_ddp_comp_get_type Yongqiang Niu
2018-12-25  4:19   ` Nicolas Boichat
2018-12-24  8:08 ` [PATCH 17/18] drm/mediatek: add ovl0/ovl0_2l usecase Yongqiang Niu
2018-12-25  4:22   ` Nicolas Boichat
2018-12-24  8:08 ` [PATCH 18/18] drm/mediatek: add support for mediatek SOC MT8183 Yongqiang Niu
  -- strict thread matches above, loose matches on Subject: below --
2019-03-14  8:23 [PATCH 00/18] add drm support for MT8183 yongqiang.niu
2019-03-14  8:23 ` [PATCH 13/18] drm/mediatek: add ddp write register common api yongqiang.niu

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