[PATCH 1/2] Documentation: usb: dwc3: add power down clock scale property

[Jun Li <jun.li@nxp.com>]

The USB3 suspend_clk input replaces pipe3_rx_pclk as a clock
source to a small part of the USB3 core that operates when the
SS PHY is in its lowest power(P3) state, and therefore does
not provide a clock. The power down scale specifies how many
suspend_clk periods fit into a 16 KHz clock period, details
can see DWC3 databook register GCTL.PWRDNSCALE.

Signed-off-by: Li Jun <jun.li@nxp.com>
---
 Documentation/devicetree/bindings/usb/dwc3.txt | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
index 3e4c38b..d1c8b62 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -102,6 +102,12 @@ Optional properties:
 			more than one value, which means undefined length INCR burst type
 			enabled. The values can be 1, 4, 8, 16, 32, 64, 128 and 256.
 
+ - snps,power-down-scale: Power down scale field specifies how many suspend_clk
+			periods fit into a 16 Khz clock period. When performing
+			the division, round up the remainder. Suspend clock is
+			from 32kHz to 125MHz, means the value range is 2~8000.
+			(details see DWC_usb3 databook register GCTL.PWRDNSCALE).
+
  - in addition all properties from usb-xhci.txt from the current directory are
    supported as well
 
-- 
2.7.4