From: Lucas Stach <l.stach@pengutronix.de>
To: Carlo Caione <ccaione@baylibre.com>,
robh+dt@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org,
s.hauer@pengutronix.de, kernel@pengutronix.de,
festevam@gmail.com, linux-imx@nxp.com, abel.vesa@nxp.com,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] arm64: dts: imx8mq: Add on-chip OTP controller node
Date: Fri, 01 Feb 2019 16:54:23 +0100 [thread overview]
Message-ID: <1549036463.6869.58.camel@pengutronix.de> (raw)
In-Reply-To: <20190128194343.13713-1-ccaione@baylibre.com>
Am Montag, den 28.01.2019, 19:43 +0000 schrieb Carlo Caione:
> Add the node for the OTP controller. The IP is the same as on the imx7d.
>
> > Signed-off-by: Carlo Caione <ccaione@baylibre.com>
> ---
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index 892063a7c26c..9a5205f08f3a 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -234,6 +234,14 @@
> > reg = <0x30340000 0x10000>;
> > };
>
> > > + ocotp: ocotp-ctrl@30350000 {
> + compatible = "fsl,imx7d-ocotp", "syscon";
Please add a imx8mq compatible here.
Regards,
Lucas
> + reg = <0x30350000 0x10000>;
> > + clocks = <&clk IMX8MQ_CLK_OCOTP_ROOT>;
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + };
> +
> > > anatop: syscon@30360000 {
> > compatible = "fsl,imx8mq-anatop", "syscon";
> > reg = <0x30360000 0x10000>;
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next prev parent reply other threads:[~2019-02-01 15:54 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-28 19:43 [PATCH] arm64: dts: imx8mq: Add on-chip OTP controller node Carlo Caione
2019-02-01 15:54 ` Lucas Stach [this message]
-- strict thread matches above, loose matches on Subject: below --
2019-02-26 9:04 Carlo Caione
2019-02-28 11:00 ` Abel Vesa
2019-03-04 1:24 ` Shawn Guo
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