From mboxrd@z Thu Jan 1 00:00:00 1970 From: Anson Huang Subject: [PATCH V2 3/4] arm64: dts: freescale: imx8qxp: enable scu general irq channel Date: Thu, 14 Feb 2019 03:44:37 +0000 Message-ID: <1550115535-14488-4-git-send-email-Anson.Huang@nxp.com> References: <1550115535-14488-1-git-send-email-Anson.Huang@nxp.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: In-Reply-To: <1550115535-14488-1-git-send-email-Anson.Huang@nxp.com> Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org To: "robh+dt@kernel.org" , "mark.rutland@arm.com" , "shawnguo@kernel.org" , "s.hauer@pengutronix.de" , "kernel@pengutronix.de" , "festevam@gmail.com" , "a.zummo@towertech.it" , "alexandre.belloni@bootlin.com" , Aisheng Dong , "ulf.hansson@linaro.org" , "sboyd@kernel.org" , Daniel Baluta , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , linux-rtc Cc: dl-linux-imx List-Id: devicetree@vger.kernel.org On i.MX8QXP, SCU uses MU1 general interrupt channel #3 to notify user for IRQs of RTC alarm, thermal alarm and WDOG etc., mailbox RX doorbell mode is used for this function, this patch adds support for it. Signed-off-by: Anson Huang --- No change since V1. --- arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/d= ts/freescale/imx8qxp.dtsi index 1e08387..593e2db 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi @@ -112,7 +112,8 @@ scu { compatible =3D "fsl,imx-scu"; mbox-names =3D "tx0", "tx1", "tx2", "tx3", - "rx0", "rx1", "rx2", "rx3"; + "rx0", "rx1", "rx2", "rx3", + "gi3"; mboxes =3D <&lsio_mu1 0 0 &lsio_mu1 0 1 &lsio_mu1 0 2 @@ -120,7 +121,8 @@ &lsio_mu1 1 0 &lsio_mu1 1 1 &lsio_mu1 1 2 - &lsio_mu1 1 3>; + &lsio_mu1 1 3 + &lsio_mu1 3 3>; =20 clk: clock-controller { compatible =3D "fsl,imx8qxp-clk"; --=20 2.7.4